R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 483

• Manufacturer Part Number: R5F61668MZN50FPV
• Description: MCU FLASH 1024K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668MZN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

11.3.4
EDTCR is a 32-bit readable/writable register that specifies the size of data to be transferred (total
transfer size).
When EDTCR is set to H'00000001, the total transfer size is 1 byte. When EDTCR is set to
H'00000000, the total transfer size is not specified and the transfer counter is halted (free-running
mode). In this case, no transfer end interrupt by the transfer counter is generated. When EDTCR is
set to H'FFFFFFFF, up to 4 Gbytes (4,294,967,295 bytes) of the total transfer size is set. When the
EXDMA is active, EDTCR indicates the remaining transfer size. The value according to the data
access size (byte: −1, word: −2, longword: −4) is decremented each time of a data transfer.
EDTCR can be read at all times by the CPU. When reading EDTCR for a channel on which
EXDMA transfer processing is in progress, a longword-size read must be executed. Do not write
to EDTCR for a channel on which EXDMA transfer is in progress.
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
EXDMA Transfer Count Register (EDTCR)
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
Rev. 1.00 Jan. 29, 2010 Page 451 of 1380
Section 11 EXDMA Controller (EXDMAC)
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
REJ09B0596-0100
R/W
R/W
R/W
R/W
24
16
0
0
8
0
0
0