R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 980

• Manufacturer Part Number: R5F61668MZN50FPV
• Description: MCU FLASH 1024K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668MZN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 20 USB Function Module (USB)
Rev. 1.00 Jan. 29, 2010 Page 948 of 1380
REJ09B0596-0100
Bit
0
Bit Name
EP1DMAE
Initial
Value
0
R/W
R/W
Description
Endpoint 1 DMA Transfer Enable
When this bit is set, a DMAC start interrupt signal
(USBINTN0) is asserted and DMA transfer is enabled
from the endpoint 1 receive FIFO buffer to memory. If
there is at least one byte of receive data in the FIFO
buffer, the DMAC start interrupt signal (USBINTN0) is
asserted. In DMA transfer, when all the received data
is read, EP1 is automatically read and the completion
trigger operates.
EP1-related interrupt requests to the CPU are not
automatically masked.
•
1. Write of 1 to the EP1 DMAE bit in DMA
2. Set the DMAC to activate through USBINTN0
3. Transfer count setting in the DMAC
4. DMAC activation
5. DMA transfer
6. DMA transfer end interrupt generated
See section 20.8.2, DMA Transfer for Endpoint 1.
Operating procedure: