DF2317VTE25 Renesas Electronics America, DF2317VTE25 Datasheet - Page 777
![MCU 3V 128K 100-TQFP](/photos/28/61/286108/100-tqfp_sml.jpg)
DF2317VTE25
Manufacturer Part Number
DF2317VTE25
Description
MCU 3V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.D12312SVTE25V.pdf
(1146 pages)
Specifications of DF2317VTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
79
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2317VTE25
HD64F2317VTE25
HD64F2317VTE25
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
DF2317VTE25V
Manufacturer:
AD
Quantity:
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Company:
Part Number:
DF2317VTE25V
Manufacturer:
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Quantity:
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Figure 17.78 shows an example of programming of the data, after emulation has been completed,
to the EB0 area in the user MAT.
[1] After the data to be programmed has fixed values, clear the RAMS bit to 0 to cancel the
[2] Transfer the user programming/erasing procedure program to RAM.
[3] Run the programming/erasing procedure program in RAM and download the on-chip
[4] When the EB0 area of the user MAT has not been erased, the programming program will be
Note: Setting the RAMS bit to 1 puts all the blocks in the flash MAT into a program/erase-
overlap of RAM.
programming/erasing program.
Specify the download start address with FTDAR so that the tuned data area does not overlap
with the download area.
downloaded after erasure. Set the parameters FMPAR and FMPDR so that the tuned data is
designated, and execute programming.
H'7FFFF
H'00000
H'01000
H'02000
H'03000
H'04000
H'05000
H'06000
H'07000
H'08000
protected state regardless of the values of the RAM2 to RAM0 bits (emulation protection).
In this state, downloading of the on-chip programs is also disabled, so clear the RAMS bit
before actual programming or erasure.
Flash memory
EB8 to EB15
(user MAT)
Figure 17.78 Programming of the Data After Tuning
EB0
EB1
EB2
EB3
EB4
EB5
EB6
EB7
[1] Cancel the emulation mode.
[2] Transfer the user-created program/
[3] Download the on-chip programming/erasing
[4] Execute programming after erasing,
erase-procedure program.
programs, avoiding the tuning <illegible>
data area set in FTDAR.
as necessary.
programming-procedure
Copy of the tuned data
Download area
Rev.7.00 Feb. 14, 2007 page 743 of 1108
On-chip RAM
Area for the
program
H'FFBC00
H'FFCC00
H'FFDC00
H'FFEBFF
H'FFFBFF
REJ09B0089-0700
Section 17 ROM
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