DF3026X25V Renesas Electronics America, DF3026X25V Datasheet - Page 679
![MCU 3V 256K PB-FREE 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
DF3026X25V
Manufacturer Part Number
DF3026X25V
Description
MCU 3V 256K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3026X25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3026X25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 679 of 843
- Download datasheet (5Mb)
A.1
Operand Notation
Note: General registers include 8-bit registers (R0H to R7H and R0L to R7L) and 16-bit registers
Symbol
Rd
Rs
Rn
ERd
ERs
ERn
(EAd)
(EAs)
PC
SP
CCR
N
Z
V
C
disp
+
–
÷
¬
( ), < >
(R0 to R7 and E0 to E7).
Instruction List
Description
General destination register
General source register
General register
General destination register (address register or 32-bit register)
General source register (address register or 32-bit register)
General register (32-bit register)
Destination operand
Source operand
Program counter
Stack pointer
Condition code register
N (negative) flag in CCR
Z (zero) flag in CCR
V (overflow) flag in CCR
C (carry) flag in CCR
Displacement
Transfer from the operand on the left to the operand on the right, or transition from
the state on the left to the state on the right
Addition of the operands on both sides
Subtraction of the operand on the right from the operand on the left
Multiplication of the operands on both sides
Division of the operand on the left by the operand on the right
Logical AND of the operands on both sides
Logical OR of the operands on both sides
Exclusive logical OR of the operands on both sides
NOT (logical complement)
Contents of operand
Appendix A Instruction Set
Rev. 2.00 Sep 20, 2005 page 639 of 800
Appendix A Instruction Set
REJ09B0260-0200
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