HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 237
HD6417760BL200AV
Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BL200AV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
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The operand cache of this LSI uses the 2-way set-associative method, and each way is configured
of 512 cache lines. Figure 7.1 shows the configuration of the operand cache.
The instruction cache uses the 2-way set-associative method, and each way is configured of 256
cache lines. Figure 7.2 shows the configuration of the instruction cache.
Effective address
31
22
19
MMU
OIX
ORA
26 25
9
Entry
selection
511
Compare
way 0
0
Figure 7.1 Configuration of Operand Cache
Hit signal
[13]
19 bits
(way 0, way 1)
Address array
Tag
Compare
RAM area
way 1
definition
1 bit 1 bit
U
V
3
13 12
32 bits
LW0
32 bits
10
LW1
Read data
Data array (way 0, way 1)
32 bits
LW2
Rev. 2.00 Feb. 12, 2010 Page 153 of 1330
[12:5]
32 bits
LW3
5 4
32 bits
LW4
Longword (LW)
selection
2
32 bits
LW5
Write data
0
32 bits
LW6
REJ09B0554-0200
32 bits
LW7
LRU
1 bit
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