HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 924
HD6417760BL200AV
Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BL200AV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
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Part Number:
HD6417760BL200AV
Manufacturer:
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22.6
22.6.1
The HCAN2 has various test modes. The register TST[7:0] (MCR[15:8]) is used to select the
HCAN2 test mode. The default (initialized) settings allow HCAN2 to operate in Normal mode.
The following table is examples for test modes.
• Normal Mode: HCAN2 operates in the normal mode.
• Listen-Only Mode: ISO-11898 requires this mode for baud rate detection etc. The Error
• Self Test Mode 1: HCAN2 generates its own Acknowledge bit. The Rx/Tx pin must be
• Self Test Mode 2: HCAN2 generates its own Acknowledge bit. The Rx/Tx pin does not need
• Error Passive Mode 1: HCAN2 can be forced to become Error Passive node by writing a value
• Error Passive Mode 2: HCAN2 can be forced to become an Error Passive node by setting the
Rev. 2.00 Feb. 12, 2010 Page 840 of 1330
REJ09B0554-0200
Bit 15:
0
1
1
1
1
1
TST7
Counters are disabled so that TEC/REC does not increase the value, and the Tx Output is
disabled so that HCAN2 does not generate error frames.
connected to the CAN bus.
to be connected to the CAN bus or any external devices, as the internal Tx is looped back to
the internal Rx.
(greater than 127) into the Error Counter (MCR1 must be 1 when writing to the Error
Counter). The value written into TEC is written into REC, so only the same value can be set to
these registers. Also, HCAN2 needs to be put into Halt Mode when writing into TEC/REC.
TST5.
0
0
0
0
1
—
Bit 14:
TST6
Operation
Test Mode Settings
0
0
0
0
0
1
Bit 13:
TST5
0
0
1
1
—
—
Bit 12:
TST4
0
1
—
—
—
—
Bit 11:
TST3
0
0
0
1
—
—
Bit 10:
TST2
0
1
0
1
—
—
Bit 9:
TST1
0
0
0
1
—
—
Bit 8:
TST0
Error Passive Mode 1
Error Passive Mode 2
Normal mode (initial value)
Listen-Only Mode (Receive-Only Mode)
Self Test Mode 1 (External)
Self Test Mode 2 (Internal)
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