UPD78F9201MA-CAC-A Renesas Electronics America, UPD78F9201MA-CAC-A Datasheet - Page 240

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UPD78F9201MA-CAC-A

Manufacturer Part Number
UPD78F9201MA-CAC-A
Description
MCU 8BIT 2KB FLASH 128B RAM
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9201MA-CAC-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
7
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
238
This register is set with an 8-bit memory manipulation instruction.
Reset signal generation makes the contents of this register undefined.
Address: FFA2H
Symbol
FLPMC
Figure 16-10. Format of Flash Programming Mode Control Register (FLPMC)
Notes 1. Bit 0 (FLSPM) is cleared to 0 when reset is released. The set value of the protect
Cautions 1. Cautions in the case of setting the self programming mode, refer to 16.8.2
PRSELF4 PRSELF3 PRSELF2 PRSELF1 PRSELF0 The set value of the protect byte
FLSPM
7
0
0
1
2. Bits 2 to 6 (PRSELF0 to PRSELF4) are read-only.
After reset: Undefined
2. Set the CPU clock so that it is 1 MHz or more during self programming.
3. Execute the NOP and HALT instructions immediately after executing a
4. If the clock of the oscillator or an external clock is selected as the system
5. Clear the value of the FLCMD register to 00H immediately before setting self-
byte is read to bits 2 to 6 (PRSELF0 to PRSELF4) after reset is released.
Normal mode
Self-programming mode
PRSELF4 PRSELF3 PRSELF2 PRSELF1 PRSELF0
This is the normal operation status.
standby status.
Self programming commands can be executed by executing the specific
sequence to change modes while in normal mode.
Set a command, an address, and data to be written, then execute the HALT
instruction to execute self programming.
Cautions on self programming function.
specific sequence to set self-programming mode, then execute self
programming. At this time, the HALT instruction is automatically released
after 10
clock, execute the NOP and HALT instructions immediately after executing a
specific sequence to set self-programming mode, wait for 8 µs after
releasing the HALT status, and then execute self programming.
programming mode and normal operation mode.
6
CHAPTER 16 FLASH MEMORY
Selection of operation mode during self-programming mode
μ
s (MAX.) + 2 CPU clocks (f
User’s Manual U18172EJ3V0UD
5
Note 1
4
R/W
Note 2
3
Executing the HALT instruction sets
CPU
is read to these bits.
).
2
1
0
FLSPM
0

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