UPD78F9201MA-CAC-A Renesas Electronics America, UPD78F9201MA-CAC-A Datasheet - Page 325

• Manufacturer Part Number: UPD78F9201MA-CAC-A
• Description: MCU 8BIT 2KB FLASH 128B RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9201MA-CAC-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 7
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

Port
functions
Main clock OSTS:
Crystal/
ceramic
oscillator
(
20x only)
16-bit
timer/
event
counters
00
(
20x only)
μ
μ
Function
PD78F9
PD78F9
P21, P32
PMC2: Port
mode control
register 2
(
only)
Oscillation
stabilization
time select
register
(
only)
TM00: 16-bit
timer counter
00
CR000: 16-bit
timer capture/
compare
register 000
μ
μ
PD78F920x
PD78F920x
Details of
Function
−
−
Because P21 and P32 are also used as external interrupt pins, the corresponding
interrupt request flag is set if each of these pins is set to the output mode and its
output level is changed. To use the port pin in the output mode, therefore, set the
corresponding interrupt mask flag to 1 in advance.
When PMC20 to PMC23 are set to 1, the port function on the P20/ANI0 to
P23/ANI3 pins cannot be used. Moreover, be sure to set the pull-up resistor
option registers (PU20 to PU23) to 0 for the pins set to A/D converter mode.
Although a 1-bit memory manipulation instruction manipulates 1 bit, it accesses a
port in 8-bit units. Therefore, the contents of the output latch of a pin in the input
mode, even if it is not subject to manipulation by the instruction, are undefined in
a port with a mixture of inputs and outputs.
To set and then release the STOP mode, set the oscillation stabilization time as
follows.
Expected oscillation stabilization time of resonator ≤ Oscillation stabilization time
set by OSTS
The wait time after the STOP mode is released does not include the time from the
release of the STOP mode to the start of clock oscillation (“a” in the figure below),
regardless of whether STOP mode was released by reset input or interrupt
generation.
The oscillation stabilization time that elapses on power application or after release
of reset is selected by the option byte. For details, refer to CHAPTER 15
OPTION BYTE.
When using the crystal/ceramic oscillator, wire as follows in the area enclosed by
the broken lines in Figure 5-6 to avoid an adverse effect from wiring capacitance.
Even if TM00 is read, the value is not captured by CR010.
When TM00 is read, count misses do not occur, since the input of the count clock
is temporarily stopped and then resumed after the read.
Set CR000 to other than 0000H in the clear & start mode entered on match
between TM00 and CR000. This means a 1-pulse count operation cannot be
performed when this register is used as an external event counter. However, in
the free-running mode and in the clear & start mode using the valid edge of the
TI000 pin, if CR000 is set to 0000H, an interrupt request (INTTM000) is generated
when CR000 changes from 0000H to 0001H following overflow (FFFFH).
If the new value of CR000 is less than the value of 16-bit timer counter 0 (TM00),
TM00 continues counting, overflows, and then starts counting from 0 again. If the
new value of CR000 is less than the old value, therefore, the timer must be reset
to be restarted after the value of CR000 is changed.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines. Do not route the wiring
• Always make the ground point of the oscillator capacitor the same potential
• Do not fetch signals from the oscillator.
near a signal line through which a high fluctuating current flows.
as V
current flows.
SS
APPENDIX D LIST OF CAUTIONS
. Do not ground the capacitor to a ground pattern through which a high
User’s Manual U18172EJ3V0UD
Cautions
p. 67
p. 69
p. 71
p. 78
p. 78
p. 78
p. 79
pp. 92,
124
pp. 92,
124
pp. 93,
124
pp.93,
124
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