UPD78F9202MA-CAC-A Renesas Electronics America, UPD78F9202MA-CAC-A Datasheet - Page 282

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UPD78F9202MA-CAC-A

Manufacturer Part Number
UPD78F9202MA-CAC-A
Description
MCU 8BIT 4KB FLASH 128B RAM
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9202MA-CAC-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
7
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-

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Part Number:
UPD78F9202MA-CAC-A
Manufacturer:
NEC/PBF
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Part Number:
UPD78F9202MA-CAC-A
Manufacturer:
RENESAS/瑞萨
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17.1 Connecting QB-MINI2 to 78K0S/KU1+
via an on-chip debug emulator (QB-MINI2).
280
The 78K0S/KU1+ uses RESET, X1
Notes 1.
Caution The 78K0S/KU1+ has an on-chip debug function, which is provided for development and
Target connector
Caution The constants described in the circuit connection example are reference values. If you
Note
RESET_OUT
2.
RESET_IN
H/S
evaluation. Do not use the on-chip debug function in products designated for mass production,
because the guaranteed number of rewritable times of the flash memory may be exceeded when
this function is used, and product reliability therefore cannot be guaranteed. NEC Electronics is
not liable for problems occurring when the on-chip debug function is used.
R.F.U.
R.F.U.
R.F.U.
R.F.U.
R.F.U.
R.F.U.
DATA
DATA
PD78F920x: X1/P23/ANI3,
PD78F920x: X2/P22/ANI2,
1. The RESET pin is used to download the monitor program at debugger startup or to implement
GND
Note 4
INTP
CLK
CLK
V
DD
perform flash programming aiming at mass production, thoroughly evaluate whether the
specifications of the target device are satisfied.
forced reset. Therefore, a pin that alternately functions as the RESET pin cannot be used. For
reset pin connection, refer to QB-MINI2 User’s Manual (U18371E).
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
V
CHAPTER 17 ON-CHIP DEBUG FUNCTION
DD
Figure 17-1. Recommended Circuit Connection
Note 1
, X2
Note 3
Note 3
PD78F950x: EXCLK/P23
PD78F950x: P22
User’s Manual U18172EJ3V0UD
Note 2
, INTP1, V
10 k
V
V
V
DD
DD
DD
DD
, and GND pins to communicate with the host machine
3 to 10 k
1 k
1 k
1 to 10 k
RESET
X2
X1
INTP1
PD78F920x: X2
PD78F950x: P22
PD78F920x: X1
PD78F950x: EXCLK
RESET signal
Note 2
Note 2
Reset circuit
Target device
Note 5
Note 1
V
V
DD
SS
V
DD

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