UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 163
UPD78F9234MC-5A4-A
Manufacturer Part Number
UPD78F9234MC-5A4-A
Description
MCU 8BIT 8KB FLASH 30PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9232MC-5A4-A.pdf
(419 pages)
Specifications of UPD78F9234MC-5A4-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F9234MC-5A4-A
Manufacturer:
MAXIM
Quantity:
1 001
Part Number:
UPD78F9234MC-5A4-A
Manufacturer:
NEC
Quantity:
20 000
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(2) When the watchdog timer operation clock is the low-speed internal oscillation clock (f
Watchdog timer
CPU operation
instruction is executed
When the STOP instruction is executed, operation of the watchdog timer is stopped. After STOP mode is
released, operation stops for 34 s (TYP.) and then counting is started again using the operation clock before the
operation was stopped. At this time, the counter is not cleared to 0 but holds its value.
Figure 9-7. Operation in STOP Mode (WDT Operation Clock: Low-Speed Internal Oscillation Clock)
Note The operation stop time is 17 s (MIN.), 34 s (TYP.), and 67 s (MAX.).
Watchdog timer
CPU operation
f
CPU
f
RL
Operating
operation
Normal
<2> CPU clock: High-speed internal oscillation clock or external clock input
f
CPU
f
RL
Operating
operation
Normal
STOP
Oscillation stopped
Operation stopped
<1> CPU clock: Crystal/ceramic oscillation clock
STOP
CHAPTER 9 WATCHDOG TIMER
stopped
Operation
Oscillation stopped
Operation stopped
User’s Manual U17446EJ5V0UD
Note
stopped
Operation
Oscillation stabilization time
Oscillation stabilization time
(set by OSTS register)
Note
Operating
Normal operation
Operating
Normal operation
RL
) when the STOP
161
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