UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 79

• Manufacturer Part Number: UPD78F9234MC-5A4-A
• Description: MCU 8BIT 8KB FLASH 30PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9234MC-5A4-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3) Oscillation stabilization time select register (OSTS)
Cautions 1. To set and then release the STOP mode, set the oscillation stabilization time as follows.
Remarks 1. ( ): f
Address: FFF4H After reset: Undefined R/W
This register is used to select oscillation stabilization time of the clock supplied from the oscillator when the STOP
mode is released. The wait time set by OSTS is valid only when the crystal/ceramic oscillation clock is selected
as the system clock and after the STOP mode is released. If the high-speed internal oscillator or external clock
input is selected as the system clock source, no wait time elapses.
The system clock oscillator and the oscillation stabilization time that elapses after power application or release of
reset are selected by the option byte. For details, refer to CHAPTER 18 OPTION BYTE.
OSTS is set by using an 8-bit memory manipulation instruction.
Symbol
OSTS
3. The oscillation stabilization time that elapses on power application or after release of reset is
2. The wait time after the STOP mode is released does not include the time from the release of
2. Determine the oscillation stabilization time of the resonator by checking the characteristics of the
selected by the option byte. For details, refer to CHAPTER 18 OPTION BYTE.
Expected oscillation stabilization time of resonator
OSTS
the STOP mode to the start of clock oscillation (“a” in the figure below), regardless of
whether STOP mode was released by reset signal generation or interrupt generation.
OSTS1
resonator to be used.
Figure 5-5. Format of Oscillation Stabilization Time Select Register (OSTS)
7
0
0
0
1
1
X
= 10 MHz
OSTS0
6
0
0
1
0
1
waveform
of X1 pin
Voltage
2
2
2
2
CHAPTER 5 CLOCK GENERATORS
10
12
15
17
/f
/f
/f
/f
X
X
X
X
5
0
(102.4 s)
(409.6 s)
(3.27 ms)
(13.1 ms)
STOP mode is released
User’s Manual U17446EJ5V0UD
4
0
Selection of oscillation stabilization time
a
3
0
Oscillation stabilization time set by
2
0
OSTS1
1
OSTS0
0
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