UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 288

• Manufacturer Part Number: UPD78F9234MC-5A4-A
• Description: MCU 8BIT 8KB FLASH 30PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9234MC-5A4-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

286
(1) Flash programming mode control register (FLPMC)
This register is used to set the operation mode when data is written to the flash memory in the self
Data can be written to FLPMC only in a specific sequence (refer to 19.8.3 (2) Flash protect command
This register is set with an 8-bit memory manipulation instruction.
Reset signal generation makes the contents of this register undefined.
programming mode, and to read the set value of the protect byte.
register (PFCMD)) so that the application system does not stop by accident because of malfunctions due to
noise or program hang-ups.
Address: FFA2H
Symbol
FLPMC
Figure 19-10. Format of Flash Programming Mode Control Register (FLPMC)
Notes 1. Bit 0 (FLSPM) is cleared to 0 when reset is released. The set value of the protect
Cautions 1. Cautions in the case of setting the self programming mode, refer to 19.8.2
PRSELF4 PRSELF3 PRSELF2 PRSELF1 PRSELF0 The set value of the protect byte
FLSPM
7
0
0
1
2. Bits 2 to 6 (PRSELF0 to PRSELF4) are read-only.
After reset: Undefined
2. Set the CPU clock beforehand so that it is 1 MHz or higher during self
3. Execute self programming after executing the NOP and HALT instructions
4. If the clock of the oscillator or an external clock is selected as the system
5. Clear the value of the FLCMD register to 00H immediately before setting to
byte is read to bits 2 to 6 (PRSELF0 to PRSELF4) after reset is released.
Normal mode
Self programming mode
PRSELF4 PRSELF3 PRSELF2 PRSELF1 PRSELF0
This is the normal operation status. Executing the HALT instruction sets
standby status.
Self programming commands can be executed by executing the specific
sequence to change modes while in normal mode.
Set a command, an address, and data to be written, then execute the HALT
instruction to execute self programming.
Cautions on self programming function.
programming.
immediately after executing a specific sequence to set self programming
mode. At this time, the HALT instruction is automatically released after 10
clock, execute the NOP and HALT instructions immediately after executing a
specific sequence to set self programming mode, wait for 8
releasing the HALT status, and then execute self programming.
self programming mode and normal mode.
6
s (MAX.) + 2 CPU clocks (f
CHAPTER 19 FLASH MEMORY
Selection of operation mode during self programming mode
User’s Manual U17446EJ5V0UD
5
Note 1
4
R/W
Note 2
CPU
).
3
is read to these bits.
2
1
0
FLSPM
0
s after