UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 415

• Manufacturer Part Number: UPD78F9234MC-5A4-A
• Description: MCU 8BIT 8KB FLASH 30PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9234MC-5A4-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3rd edition
Edition
Deletion of description on (T) product, (S) product, (R) product, (T2) product
Modification of 1.4 78K0S/Kx1+ Product Lineup
Addition of Caution 2 to 3.2.1 (3) Stack pointer (SP)
Modification of Figure 4-7 Block Diagram of P34
Addition of Caution to Figure 4-17 Format of Port Mode Control Register 2
Modification of Caution 2 in 6.2 (1) 16-bit timer counter 00 (TM00)
Addition of 6.5 (23) External clock limitation
Addition of Caution to Figure 10-8 Format of Port Mode Control Register 2
(PMC2)
Addition of 10.6 (10) Operating current at conversion waiting mode
Addition of Caution to 11.2 (1) Receive buffer register 6 (RXB6)
Addition of Caution 1 to and modification of Caution 3 in 11.2 (3) Transmit buffer
register 6 (TXB6)
Correction of Note 3 in Figure 11-5 Format of Asynchronous Serial Interface
Operation Mode Register 6 (ASIM6) (1/2)
Addition of Notes 1 and 2 to and modification of Cautions 1, 2 and 3 in Figure 11-5
Format of Asynchronous Serial Interface Operation Mode Register 6 (ASIM6)
(2/2)
Modification of Caution in 11.3 (6) Asynchronous serial interface control register
6 (ASICL6)
Modification of Caution 1 in Figure 11-10 Format of Asynchronous Serial
Interface Control Register 6 (ASICL6)
Modification of Caution in 11.4.2 (1) Registers used
Partial modification of description in 11.4.2 (2) (c) Normal transmission
Partial modification of description in and addition of Caution 1 to 11.4.2 (2) (d)
Continuous transmission
Addition of Caution 2 to 17.3 (2) Low-voltage detection level select register (LVIS)
Addition of 18.3 Caution When the RESET Pin Is Used as an Input-Only Port Pin
(P34)
Addition of description to 19.6.1 X1 and X2 pins
Addition of Remark 1 to 19.8 Flash Memory Programming by Self Writing
Modification of description of internal verify 1 in and addition of description and
Remark of internal verify 2 to Table 19-11 Self Programming Controlling
Commands
Partial modification of and addition to 19.8.2 Cautions on self programming
function
Addition of Cautions 2, 3 and 5 to and modification of Caution 4 in Figure 19-12
Format of Flash Programming Mode Control Register (FLPMC)
Modification of Caution in and addition of description on FPRERR to 19.8.3 (2) Flash
protect command register (PFCMD)
Addition of Caution to 19.8.3 (3) Flash status register (PFS)
APPENDIX E REVISION HISTORY
User’s Manual U17446EJ5V0UD
Description
Throughout
CHAPTER 1 OVERVIEW
CHAPTER 3 CPU
ARCHITECTURE
CHAPTER 4 PORT
FUNCTIONS
CHAPTER 6 16-BIT
TIMER/EVENT COUNTER
00
CHAPTER 10 A/D
CONVERTER
CHAPTER 11 SERIAL
INTERFACE UART6
CHAPTER 17 LOW-
VOLTAGE DETECTOR
CHAPTER 18 OPTION
BYTE
CHAPTER 19 FLASH
MEMORY
Applied to:
(3/6)
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