UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 403

• Manufacturer Part Number: UPD78F9234MC-5A4-A
• Description: MCU 8BIT 8KB FLASH 30PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9234MC-5A4-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Serial
interface
UART6
Function
ASIF6:
Asynchronous
serial interface
transmission
status register 6
CKSR6:
Clock selection
register 6
BRGC6: Baud
rate generator
control register 6
ASICL6:
Asynchronous
serial interface
control register 6
Bits 7, 6, and 5
(POWER6,
TXE6, and
RXE6) of ASIM6
Details of
Function
To transmit data continuously, write the first transmit data (first byte) to the
TXB6 register. Be sure to check that the TXBF6 flag is “0”. If so, write the
next transmit data (second byte) to the TXB6 register. If data is written to the
TXB6 register while the TXBF6 flag is “1”, the transmit data cannot be
guaranteed.
To initialize the transmission unit upon completion of continuous transmission,
be sure to check that the TXSF6 flag is “0” after generation of the transmission
completion interrupt, and then execute initialization. If initialization is executed
while the TXSF6 flag is “1”, the transmit data cannot be guaranteed.
Make sure POWER6 = 0 when rewriting TPS63 to TPS60.
Make sure that bit 6 (TXE6) and bit 5 (RXE6) of the ASIM6 register = 0 when
rewriting the MDL67 to MDL60 bits.
The baud rate is the output clock of the 8-bit counter divided by 2.
ASICL6 can be refreshed (the same value is written) by software during a
communication operation (when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6
are 1 or when bit 7 (POWER6) and bit 5 (RXE6) of ASIM6 are 1), if 0 data has
been written to ASICL6 by SBRT6 and SBTT6.
In the case of an SBF reception error, return to SBF reception mode again.
The status of the SBRF6 flag will be held (1). For details on SBF reception
refer to (2) – (i) SBF reception in 11.4.2 Asynchronous serial interface (UART)
mode described later.
Before setting the SBRT6 bit to 1, make sure that bit 7 (POWER6) and bit 5
(RXE6) of ASIM6 = 1. Moreover, after setting the SBRT6 bit to 1, do not clear
the SBRT6 bit to 0 before the SBF reception ends (an interrupt request signal
is generated).
The read value of the SBRT6 bit is always 0. SBRT6 is automatically cleared
to 0 after SBF reception has been correctly completed.
Before setting the SBTT6 bit to 1, make sure that bit 7 (POWER6) and bit 6
(TXE6) of ASIM6 = 1. Moreover, after setting the SBTT6 bit to 1, do not clear
the SBTT6 bit to 0 before the SBF transmission ends (an interrupt request
signal is generated).
The read value of the SBTT6 bit is always 0. SBTT6 is automatically cleared
to 0 at the end of SBF transmission.
Before rewriting the DIR6 and TXDLV6 bits, clear the TXE6 and RXE6 bits to
0.
Clear POWER6 to 0 after clearing TXE6 and RXE6 to 0 to set the operation
stop mode.
To start the operation, set POWER6 to 1, and then set TXE6 and RXE6 to 1.
APPENDIX D LIST OF CAUTIONS
User’s Manual U17446EJ5V0UD
Cautions
p.192
p.192
p.193
p.194
p.194
p.195
p.196
p.196
p.196
p.196
p.196
p.196
p.198
(12/20)
Page
401