MAXQ3108-FFN+ Maxim Integrated Products, MAXQ3108-FFN+ Datasheet - Page 25

• Manufacturer Part Number: MAXQ3108-FFN+
• Description: IC MCU DUAL-CORE 16BIT 28-TSSOP
• Manufacturer: Maxim Integrated Products
• Series: MAXQ™r

Specifications of MAXQ3108-FFN+

• Core Processor: RISC
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 11K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-TSSOP
• Processor Series: MAXQ
• Core: RISC
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, JTAG, SPI
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

EIES1 (0Bh, 01h)
Initialization:
Read/Write Access:
EIES1.[3:0]: IT[11:8]
EIES1.[7:4]: Reserved
SVM (0Ch, 01h)
Initialization:
Read/Write Access:
SVM.0: SVMEN
SVM.1: SVMRDY
SVM.2: SVMIE
SVM.3: SVMI
SVM.4: SVMSTOP
SVM.[7:5]: Reserved
SVM.[11:8]: SVTH[3:0]
SVM.[15:12]: Reserved
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Low-Power, Dual-Core Microcontroller
External Interrupt Edge Select 1 Register
EIES1 is cleared to 00h on all forms of reset.
Unrestricted read/write.
External Interrupt Edge Select Bits 11:8
Reserved. Reads return 0.
Supply Voltage Monitor Register (16-Bit Register)
This register is set to 0700h on all forms of reset.
Unrestricted read/write except SVMRDY and SVMTH. The supply voltage monitor ready (SVMRDY)
bit is set and cleared by hardware only. SVMTH can only be written to when the supply voltage
monitor is disabled (SVMEN = 0).
Supply Voltage Monitor Enable. Setting this bit to 1 enables the monitoring of supply voltage
according to SVMTH settings. Clearing this bit to 0 disables the supply voltage monitoring
circuitry.
Supply Voltage Monitor Ready. This bit is set to 1 to indicate that the supply voltage monitor is
ready for use. This bit is cleared to 0 when SVMEN = 0 or on entrance to stop mode if SVMSTOP = 0.
Supply Voltage Monitor Interrupt Enable. Setting this bit to 1 generates an interrupt to the CPU
when SVMI is set to 1. Clearing this bit to 0 disables the interrupt from generating.
Supply Voltage Monitor Interrupt. This bit is set to 1 when the supply voltage falls below the set
point defined by SVTH. Clearing this bit to 0 clears the interrupt. However, if the supply voltage is
still below the set point, this flag is set again. Setting this bit to 1 causes an interrupt to the CPU
when SVMIE = 1.
Supply Voltage Monitor Stop Mode Enable. Setting this bit to 1 enables the supply voltage monitor
circuit to operate during stop mode if SVMEN = 1. Clearing this bit to 0 disables the supply voltage
monitor when stop mode is enabled.
Reserved. Reads return 0.
Supply Voltage Threshold Bits [3:0]. These bits are used to select a user-defined supply voltage
threshold under which an interrupt is generated to the CPU if enabled. The level can be adjusted
from 2.0V to 3.5V in a 0.1V increment. The supply voltage monitor is enabled by setting SVMEN =
1. The default value is 07h (2.7V).
Note that the SVTH bits can only be modified when SVMEN = 0. Writing to these bits is ignored if
SVMEN = 1.
Reserved. Reads return 0.
ITx = 0: External interrupt x is positive-edge triggered.
ITx = 1: External interrupt x is negative-edge triggered.
Special Function Register Bit Descriptions (continued)
Supply Voltage Monitor Threshold = 2.0V + SVMTH[3:0] x 0.1V
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