SAK-XC2237M-104F40L Infineon Technologies, SAK-XC2237M-104F40L Datasheet - Page 14

• Manufacturer Part Number: SAK-XC2237M-104F40L
• Description: IC MCU 16BIT 320KB FLASH 64LQFP
• Manufacturer: Infineon Technologies
• Series: XC22xxMr

Specifications of SAK-XC2237M-104F40L

• Core Processor: C166SV2
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
• Peripherals: I²S, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 50K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Key to Pin Definitions
•
•
Table 5
Pin
3
4
5
7
Data Sheet
Ctrl.: The output signal for a port pin is selected by bitfield PC in the associated
register Px_IOCRy. Output O0 is selected by setting the respective bitfield PC to
1x00
Output signal OH is controlled by hardware.
Type: Indicates the pad type and its power supply domain (A, B, M, 1)
– St: Standard pad
– Sp: Special pad
– DP: Double pad - can be used as standard or high-speed pad
– In: Input only pad
– PS: Power supply pad
Symbol
TESTM
TRST
P7.0
T3OUT
T6OUT
TDO_A
ESR2_1
P6.0
EMUX0
BRKOUT
ADCx_REQG
TyG
U1C1_DX0E
B
, output O1 is selected by 1x01
Pin Definitions and Functions
Ctrl.
I
I
O0 / I St/B
O1
O2
OH / I St/B
I
O0 / I St/A
O1
O3
I
I
Type Function
In/B
In/B
St/B
St/B
St/B
St/A
St/A
St/A
St/A
Testmode Enable
Enables factory test modes, must be held HIGH for
normal operation (connect to
An internal pullup device will hold this pin high
when nothing is driving it.
Test-System Reset Input
For normal system operation, pin TRST should be
held low. A high level at this pin at the rising edge
of PORST activates the XC223xM’s debug
system. In this case, pin TRST must be driven low
once to reset the debug system.
An internal pulldown device will hold this pin low
when nothing is driving it.
Bit 0 of Port 7, General Purpose Input/Output
GPT12E Timer T3 Toggle Latch Output
GPT12E Timer T6 Toggle Latch Output
JTAG Test Data Output / DAP1 Input/Output
ESR2 Trigger Input 1
Bit 0 of Port 6, General Purpose Input/Output
External Analog MUX Control Output 0 (ADC0)
OCDS Break Signal Output
External Request Gate Input for ADC0/1
USIC1 Channel 1 Shift Data Input
B
XC2000 Family Derivatives / Base Line
, etc.
14
General Device Information
XC2238M, XC2239M
V
DDPB
).
V2.0, 2009-03