SAK-XC2237M-104F40L Infineon Technologies, SAK-XC2237M-104F40L Datasheet - Page 26

• Manufacturer Part Number: SAK-XC2237M-104F40L
• Description: IC MCU 16BIT 320KB FLASH 64LQFP
• Manufacturer: Infineon Technologies
• Series: XC22xxMr

Specifications of SAK-XC2237M-104F40L

• Core Processor: C166SV2
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
• Peripherals: I²S, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 50K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 6
Address Area
Reserved
MultiCAN/USIC regs.
Reserved
USIC registers
MultiCAN registers
External memory area
SFR area
Dual-Port RAM
Reserved for DPRAM
ESFR area
XSFR area
Data SRAM
Reserved for DSRAM
External memory area
1) The areas marked with “<” are slightly smaller than indicated. See column “Notes”.
2) The uppermost 4-Kbyte sector of the first Flash segment is reserved for internal use (C0’F000
3) Several pipeline optimizations are not active within the external IO area. This is necessary to control external
4) The alternate location for USIC and MultiCAN registers allows access to these modules using the same data
Up to 32 Kbytes of on-chip Program SRAM (PSRAM) are provided to store user code
or data. The PSRAM is accessed via the PMU and is optimized for code fetches. A
section of the PSRAM with programmable size can be write-protected.
Note: The actual size of the PSRAM depends on the quoted device type.
16 Kbytes of on-chip Data SRAM (DSRAM) are used for storage of general user data.
The DSRAM is accessed via a separate interface and is optimized for data access.
2 Kbytes of on-chip Dual-Port RAM (DPRAM) provide storage for user-defined
variables, for the system stack, and for general purpose register banks. A register bank
can consist of up to 16 word-wide (R0 to R15) and/or byte-wide (RL0, RH0, …, RL7,
RH7) General Purpose Registers (GPRs).
The upper 256 bytes of the DPRAM are directly bit addressable. When used by a GPR,
any location in the DPRAM is bit addressable.
Data Sheet
peripherals properly.
page pointer.
XC223xM Memory Map (cont’d)
Start Loc.
20’C000
20’8000
20’6000
20’4000
20’0000
01’0000
00’FE00
00’F600
00’F200
00’F000
00’E000
00’A000
00’8000
00’0000
H
H
H
H
H
H
H
H
H
H
H
H
H
H
End Loc.
20’FFFF
20’BFFF
20’7FFF
20’5FFF
20’3FFF
1F’FFFF
00’FFFF
00’FDFF
00’F5FF
00’F1FF
00’EFFF
00’DFFF
00’9FFF
00’7FFF
XC2000 Family Derivatives / Base Line
26
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Area Size
16 Kbytes
16 Kbytes
8 Kbytes
8 Kbytes
16 Kbytes
< 2 Mbytes
0.5 Kbyte
2 Kbytes
1 Kbyte
0.5 Kbyte
4 Kbytes
16 Kbytes
8 Kbytes
32 Kbytes
1)
Functional Description
XC2238M, XC2239M
Notes
–
Alternate location
–
Accessed via EBC
Accessed via EBC
Minus segment 0
–
–
–
–
–
–
–
–
V2.0, 2009-03
H
to C0’FFFF
4)
H
).