SAK-XC2237M-104F40L Infineon Technologies, SAK-XC2237M-104F40L Datasheet - Page 92

• Manufacturer Part Number: SAK-XC2237M-104F40L
• Description: IC MCU 16BIT 320KB FLASH 64LQFP
• Manufacturer: Infineon Technologies
• Series: XC22xxMr

Specifications of SAK-XC2237M-104F40L

• Core Processor: C166SV2
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
• Peripherals: I²S, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 50K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 21
Note: This timing diagram shows a standard configuration where the slave select signal
Data Sheet
is low-active and the serial clock signal is not shifted and not inverted.
Master Mode Timing
Select Output
SELOx
Clock Output
SCLKOUT
Data Output
DOUT
Data Input
DX0
Slave Mode Timing
Select Input
DX2
Clock Input
DX1
Data Input
DX0
Data Output
DOUT
USIC - SSC Master/Slave Mode Timing
Transmit Edge: with this clock edge , transmit data is shifted to transmit data output .
Receive Edge: with this clock edge , receive data at receive data input is latched .
Drawn for BRGH.SCLKCFG = 00
Inactive
Inactive
t
t
10
1
First Transmit
Edge
t
t
First Transmit
Edge
14
3
B
t
. Also valid for for SCLKCFG = 01
t
12
4
Data
Data
valid
valid
XC2000 Family Derivatives / Base Line
Receive
Edge
Receive
Edge
t
92
t
13
5
Active
Active
Transmit
Edge
Transmit
Edge
t
t
14
3
B
with inverted SCLKOUT signal .
XC2238M, XC2239M
Electrical Parameters
USIC_SSC_TMGX.VSD
t
t
12
4
Data
Data
valid
valid
t
Last Receive
Edge
Last Receive
Edge
t
t
t
13
5
11
2
Inactive
Inactive
V2.0, 2009-03