AT89C5132-ROTIL Atmel, AT89C5132-ROTIL Datasheet - Page 147
AT89C5132-ROTIL
Manufacturer Part Number
AT89C5132-ROTIL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Datasheets
1.AT89C5132-ROTUL.pdf
(182 pages)
2.AT89C5132-ROTUL.pdf
(38 pages)
3.AT89C5132-ROTIL.pdf
(33 pages)
Specifications of AT89C5132-ROTIL
Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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21. Analog to Digital Converter
21.1
4173E–USB–09/07
Description
The AT89C5132 implement a 2-channel 10-bit (8 true bits) analog to digital converter (ADC).
First channel of this ADC can be used for battery monitoring while the second one can be used
for voice sampling at 8 kHz.
The A/D converter interfaces with the C51 core through four special function registers: ADCON,
the ADC control register (see
and
As shown in Figure 21-1, the ADC is composed of a 10-bit cascaded potentiometric digital to
analog converter, connected to the negative input of a comparator. The output voltage of this
DAC is compared to the analog voltage stored in the Sample and Hold and coming from AIN0 or
AIN1 input depending on the channel selected (see Table 30). The 10-bit ADDAT converted
value (see formula in Figure 21-1) is delivered in ADDH and ADDL registers, ADDH is giving the
8 most significant bits while ADDL is giving the 2 least significant bits. ADDAT
Figure 21-1. ADC Structure
Figure 21-2 shows the timing diagram of a complete conversion. For simplicity, the figure depicts
the waveforms in idealized form and do not provide precise timing information. For ADC charac-
teristics and timing parameters refer to the section “AC Characteristics”.
Table
AIN1
AIN0
34); and ADCLK, the ADC clock register (see Table 32).
CLOCK
ADC
ADDAT
ADCON.0
ADCS
0
1
=
1023 V
-------------------------- -
Table
ADCON.5
Sample and Hold
V
ADEN
REF
⋅
CONTROL
31); ADDH and ADDL, the ADC data registers (see
IN
AVSS
ADCON.3
ADSST
+
-
AREFP
ADEOC
ADCON.4
R/2R DAC
AREFN
SAR
AT89C5132
EADC
IEN1.3
8
2
10
ADDH
ADDL
Table 33
ADC
Interrupt
Request
147
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