AT90CAN128-16MJ Atmel, AT90CAN128-16MJ Datasheet - Page 138
![IC MCU AVR FLASH 128K 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
AT90CAN128-16MJ
Manufacturer Part Number
AT90CAN128-16MJ
Description
IC MCU AVR FLASH 128K 64-QFN
Manufacturer
Atmel
Series
AVR® 90CANr
Specifications of AT90CAN128-16MJ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
For Use With
ATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Table 13-4.
Note:
13.11.3
13.11.4
138
Mode
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
1. The CTCn and PWMn1:0 bit definition names are obsolete. Use the
WGMn3
AT90CAN32/64/128
Timer/Counter1 Control Register B – TCCR1B
Timer/Counter3 Control Register B – TCCR3B
location of these bits are compatible with previous versions of the timer.
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Waveform Generation Mode Bit Description
WGMn2
(CTCn)
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
• Bit 7 – ICNCn: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the noise canceler is
activated, the input from the Input Capture pin (ICPn) is filtered. The filter function requires four
successive equal valued samples of the ICPn pin for changing its output. The Input Capture is
therefore delayed by four Oscillator cycles when the noise canceler is enabled.
• Bit 6 – ICESn: Input Capture Edge Select
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
(PWMn1)
WGMn1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
ICNC1
ICNC3
R/W
R/W
7
0
7
0
(PWMn0)
WGMn0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ICES1
ICES3
R/W
R/W
6
0
6
0
Timer/Counter
Mode of Operation
Normal
PWM, Phase Correct, 8-bit
PWM, Phase Correct, 9-bit
PWM, Phase Correct, 10-
bit
CTC
Fast PWM, 8-bit
Fast PWM, 9-bit
Fast PWM, 10-bit
PWM, Phase and
Frequency Correct
PWM, Phase and
Frequency Correct
PWM, Phase Correct
PWM, Phase Correct
CTC
(Reserved)
Fast PWM
Fast PWM
R
R
(1)
5
–
0
5
–
0
WGM13
WGM33
R/W
R/W
4
0
4
0
WGM
WGM12
WGM32
R/W
R/W
3
0
3
0
n2:0 definitions. However, the functionality and
CS12
CS32
TOP
0xFFFF
0x00FF
0x01FF
0x03FF
OCRnA
0x00FF
0x01FF
0x03FF
ICRn
OCRnA
ICRn
OCRnA
ICRn
–
ICRn
OCRnA
R/W
R/W
2
0
2
0
CS31
CS11
R/W
R/W
1
0
1
0
Update of
OCRnx at
Immediate
TOP
TOP
TOP
Immediate
TOP
TOP
TOP
BOTTOM
BOTTOM
TOP
TOP
Immediate
–
TOP
TOP
CS10
CS30
R/W
R/W
0
0
0
0
TCCR1B
TCCR3B
7679H–CAN–08/08
TOVn Flag
Set on
MAX
BOTTOM
BOTTOM
BOTTOM
MAX
TOP
TOP
TOP
BOTTOM
BOTTOM
BOTTOM
BOTTOM
MAX
–
TOP
TOP
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