AT90CAN128-16MJ Atmel, AT90CAN128-16MJ Datasheet - Page 327
![IC MCU AVR FLASH 128K 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
AT90CAN128-16MJ
Manufacturer Part Number
AT90CAN128-16MJ
Description
IC MCU AVR FLASH 128K 64-QFN
Manufacturer
Atmel
Series
AVR® 90CANr
Specifications of AT90CAN128-16MJ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
For Use With
ATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 327 of 428
- Download datasheet (6Mb)
24.6
7679H–CAN–08/08
Addressing the Flash During Self-Programming
An LPM instruction within three cycles after BLBSET and SPMEN are set in the SPMCSR Reg-
ister, will read either the Lock bits or the Fuse bits (depending on Z0 in the Z-pointer) into the
destination register. See
details.
• Bit 2 – PGWRT: Page Write
If this bit is written to one at the same time as SPMEN, the next SPM instruction within four clock
cycles executes Page Write, with the data stored in the temporary buffer. The page address is
taken from the high part of the Z-pointer. The data in R1 and R0 are ignored. The PGWRT bit
will auto-clear upon completion of a Page Write, or if no SPM instruction is executed within four
clock cycles. The CPU is halted during the entire Page Write operation if the NRWW section is
addressed.
• Bit 1 – PGERS: Page Erase
If this bit is written to one at the same time as SPMEN, the next SPM instruction within four clock
cycles executes Page Erase. The page address is taken from the high part of the Z-pointer. The
data in R1 and R0 are ignored. The PGERS bit will auto-clear upon completion of a Page Erase,
or if no SPM instruction is executed within four clock cycles. The CPU is halted during the entire
Page Write operation if the NRWW section is addressed.
• Bit 0 – SPMEN: Store Program Memory Enable
This bit enables the SPM instruction for the next four clock cycles. If written to one together with
either RWWSRE, BLBSET, PGWRT’ or PGERS, the following SPM instruction will have a spe-
cial meaning, see description above. If only SPMEN is written, the following SPM instruction will
store the value in R1:R0 in the temporary page buffer addressed by the Z-pointer. The LSB of
the Z-pointer is ignored. The SPMEN bit will auto-clear upon completion of an SPM instruction,
or if no SPM instruction is executed within four clock cycles. During Page Erase and Page Write,
the SPMEN bit remains high until the operation is completed.
Writing any other combination than “10001”, “01001”, “00101”, “00011” or “00001” in the lower
five bits will have no effect.
The Z-pointer is used to address the SPM commands. The Z pointer consists of the Z-registers
ZL and ZH in the register file, and RAMPZ in the I/O space. The number of bits actually used is
implementation dependent. Note that the RAMPZ register is only implemented when the pro-
gram space is larger than 64K bytes.
Since the Flash is organized in pages (see
be treated as having two different sections. One section, consisting of the least significant bits, is
addressing the words within a page, while the most significant bits are addressing the pages.
This is shown in
independently. Therefore it is of major importance that the Boot Loader software addresses the
Bit
RAMPZ
ZH (R31)
ZL (R30)
Z15
23
15
Z7
–
7
Figure
Z14
24-3. Note that the page erase and page write operations are addressed
Z6
22
14
–
6
“Reading the Fuse and Lock Bits from Software” on page 330
Z13
21
13
Z5
–
5
Z12
20
12
Z4
–
4
Table 25-11 on page
Z11
19
11
Z3
–
3
Z10
18
10
Z2
–
2
AT90CAN32/64/128
341), the Program Counter can
Z9
Z1
17
9
–
1
RAMPZ0
Z8
16
Z0
8
0
327
for
Related parts for AT90CAN128-16MJ
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![ATSTK600](/photos/9/20/92038/atstk600_tmb.jpg)
Part Number:
Description:
DEV KIT FOR AVR/AVR32
Manufacturer:
Atmel
Datasheet:
![U641B](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
![U4082B](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
![U4089B](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
![U4255BM-M](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet:
![U4089B-P](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
Monolithic Integrated Feature Phone Circuit
Manufacturer:
ATMEL Corporation
Datasheet:
![TDA4470](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
Multistandard Video-IF and Quasi Parallel Sound Processing
Manufacturer:
ATMEL Corporation
Datasheet:
![ATF22V10B-25PC](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
High-performance EE PLD
Manufacturer:
ATMEL Corporation
Datasheet:
![AT89C51ED2-IM](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
8-bit Flash Microcontroller
Manufacturer:
ATMEL Corporation
Datasheet:
![AT24C01](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
2-Wire Serial EEPROM
Manufacturer:
ATMEL Corporation
Datasheet: