AT90CAN128-16MJ Atmel, AT90CAN128-16MJ Datasheet - Page 84

• Manufacturer Part Number: AT90CAN128-16MJ
• Description: IC MCU AVR FLASH 128K 64-QFN
• Manufacturer: Atmel
• Series: AVR® 90CANr

Specifications of AT90CAN128-16MJ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• For Use With: ATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

84
AT90CAN32/64/128
• AIN0/XCK0 – Port E, Bit 2
AIN0 – Analog Comparator Positive input. This pin is directly connected to the positive input of
the Analog Comparator.
XCK0, USART0 External clock. The Data Direction Register (DDE2) controls whether the clock
is output (DDE2 set) or input (DDE2 cleared). The XCK0 pin is active only when the USART0
operates in Synchronous mode.
• PDO/TXD0 – Port E, Bit 1
PDO, SPI Serial Programming Data Output. During Serial Program Downloading, this pin is
used as data output line for the AT90CAN32/64/128.
TXD0, UART0 Transmit pin.
• PDI/RXD0 – Port E, Bit 0
PDI, SPI Serial Programming Data Input. During Serial Program Downloading, this pin is used
as data input line for the AT90CAN32/64/128.
RXD0, USART0 Receive Pin. Receive Data (Data input pin for the USART0). When the
USART0 receiver is enabled this pin is configured as an input regardless of the value of DDRE0.
When the USART0 forces this pin to be an input, a logical one in PORTE0 will turn on the inter-
nal pull-up.
Table 9-16
shown in
Table 9-16.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Figure 9-5 on page
and
Overriding Signals for Alternate Functions PE7..PE4
Table 9-17
PE7/INT7/ICP3
0
0
0
0
0
0
0
INT7 ENABLE
INT7 ENABLE
INT7 INPUT
/ICP3 INPUT
–
relates the alternate functions of Port E to the overriding signals
72.
PE6/INT6/T3
0
0
0
0
0
0
0
INT6 ENABLE
INT6 ENABLE
INT6 INPUT
/T3 INPUT
–
PE5/INT5/OC3C
0
0
0
0
OC3C ENABLE
OC3C
0
INT5 ENABLE
INT5 ENABLE
INT5 INPUT
–
PE4/INT4/OC3B
0
0
0
0
OC3B ENABLE
OC3B
0
INT4 ENABLE
INT4 ENABLE
INT4 INPUT
–
7679H–CAN–08/08