ATAM893T-TKS Atmel, ATAM893T-TKS Datasheet - Page 58

• Manufacturer Part Number: ATAM893T-TKS
• Description: IC MON TIRE-PRESS ATARX9X SER
• Manufacturer: Atmel
• Series: MARC4r

Specifications of ATAM893T-TKS

• Core Processor: MARC4
• Core Size: 4-Bit
• Speed: 4MHz
• Connectivity: SSI (2-Wire, 3 Wire)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: EEPROM
• Eeprom Size: 64 x 16
• Ram Size: 256 x 4
• Voltage - Supply (vcc/vdd): 1.8 V ~ 6.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SOIC (5.3mm Width), 20-SO, 20-SOEIAJ
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

5.3.3.11
5.3.3.12
58
ATAM893-D
Timer 3 Compare- and Compare Mode Register
Timer 3 Compare Mode Register 1 (T3CM1)
Timer 3 has two separate compare registers T3CO1 and T3CO2 for the 8-bit stage of Timer 3.
The timer compares the content of the compare register with the current counter value. If both
match, it generates a signal. This signal can be used for the counter reset, to generate a timer
interrupt, for toggling the output flip-flop, as SSI clock or as clock for the next counter stage. For
each compare register, a compare-mode register exists. These registers contain mask bits to
enable or disable the generation of an interrupt, a counter reset, or an output toggling with the
occurrence of a compare match of the corresponding compare register. The mask bits for acti-
vating the single-action mode can also be located in the compare mode registers. When
assigned to the compare register a compare event will be suppressed.
T3CM1 contains the mask bits for the match event of the Counter 3 compare register 1
T3CM1
T3SM1
T3TM1
T3RM1
T3IM1
Timer 3 Single action Mask bit 1
T3SM1 = 0, disables single-action compare mode
T3SM1 = 1, enables single-compare mode. After this bit is set, the compare
Timer 3 compare Toggle action Mask bit 1
T3TM1 = 0, disables compare toggle
T3TM1 = 1, enables compare toggle. A match of Counter 3 with the compare
Timer 3 Reset Mask bit 1
T3RM1 = 0, disables counter reset
T3RM1 = 1, enables counter reset. A match of Counter 3 with the compare
Timer 3 Interrupt Mask bit 1
T3RM1 = 0, disables Timer 3 interrupt for T3CO1 register
T3RM1 = 1, enables Timer 3 interrupt for T3CO1 register
T3SM1
Bit 3
register (T3CO1) toggles the output flip-flop (TOG3)
register (T3CO1) resets the Counter 3
register (T3CO1) is used until the next compare match
T3TM1
Bit 2
T3RM1
Bit 1
T3IM1
Bit 0
Address: 'B'hex — Subaddress: '2'hex
Reset value: 0000b
4680C–4BMCU–01/05