ATMEGA6490-16AI Atmel, ATMEGA6490-16AI Datasheet - Page 144

• Manufacturer Part Number: ATMEGA6490-16AI
• Description: IC AVR MCU FLASH 64K 5V 100TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA6490-16AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATSTK504 - STARTER KIT AVR EXP MOD 100P LCD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

17.6
17.6.1
144
Compare Match Output Unit
ATmega329/3290/649/6490
Compare Output Mode and Waveform Generation
The Compare Output mode (COM2A1:0) bits have two functions. The Waveform Generator
uses the COM2A1:0 bits for defining the Output Compare (OC2A) state at the next compare
match. Also, the COM2A1:0 bits control the OC2A pin output source.
plified schematic of the logic affected by the COM2A1:0 bit setting. The I/O Registers, I/O bits,
and I/O pins in the figure are shown in bold. Only the parts of the general I/O Port Control Regis-
ters (DDR and PORT) that are affected by the COM2A1:0 bits are shown. When referring to the
OC2A state, the reference is for the internal OC2A Register, not the OC2A pin.
Figure 17-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC2A) from the Waveform
Generator if either of the COM2A1:0 bits are set. However, the OC2A pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OC2A pin (DDR_OC2A) must be set as output before the OC2A value is vis-
ible on the pin. The port override function is independent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC2A state before the
output is enabled. Note that some COM2A1:0 bit settings are reserved for certain modes of
operation.
The Waveform Generator uses the COM2A1:0 bits differently in normal, CTC, and PWM modes.
For all modes, setting the COM2A1:0 = 0 tells the Waveform Generator that no action on the
OC2A Register is to be performed on the next compare match. For compare output actions in
the non-PWM modes refer to
on page
COMnx1
COMnx0
FOCnx
clk
154, and for phase correct PWM refer to
I/O
See “Register Description” on page 153.
Waveform
Generator
Table 17-3 on page
D
D
D
PORT
DDR
OCnx
Q
Q
Q
Table 17-5 on page
154. For fast PWM mode, refer to
1
0
154.
Figure 17-4
2552K–AVR–04/11
shows a sim-
OCnx
Pin
Table 17-4