MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 4

• Manufacturer Part Number: MCF5307CFT66B
• Description: IC MPU 32BIT 66MHZ COLDF 208FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF530xr

Specifications of MCF5307CFT66B

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, POR, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

MCF5307 Features
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— 32-bit data bus
— 16 user-accessible, 32-bit-wide, general-purpose registers
— Supervisor/user modes for system protection
— Vector base register to relocate exception-vector table
— Optimized for high-level language constructs
Multiply and accumulate unit (MAC)
— High-speed, complex arithmetic processing for DSP applications
— Tightly coupled to the OEP
— Three-stage execute pipeline with one clock issue rate for 16 x 16 operations
— 16 x 16 and 32 x 32 multiplies support, all with 32-bit accumulate
— Signed or unsigned integer support, plus signed fractional operands
Hardware integer divide unit
— Unsigned and signed integer divide support
— Tightly coupled to the OEP
— 32/16 and 32/32 operation support producing quotient and/or remainder results
8-Kbyte unified cache
— Four-way set-associative organization
— Operates at higher processor core frequency
— Provides pipelined, single-cycle access to critical code and data
— Supports write-through and copyback modes
— Four-entry, 32-bit store buffer to improve performance of operand writes
4-Kbyte SRAM
— Programmable location anywhere within 4-Gbyte linear address space
— Higher core-frequency operation
— Pipelined, single-cycle access to critical code or data
DMA controller
— Four fully programmable channels: two support external requests
— Dual-address and single-address transfer support with 8-, 16-, and 32-bit data capability
— Source/destination address pointers that can increment or remain constant
— 24-bit transfer counter per channel
— Operand packing and unpacking supported
— Auto-alignment transfers supported for efficient block movement
— Bursting and cycle steal support
— Two-bus-clock internal access
— Automatic DMA transfers from on-chip UARTs using internal interrupts
DRAM controller
— Synchronous DRAM (SDRAM), extended-data-out (EDO) DRAM, and fast page mode
support
MCF5307 Integrated Microprocessor Product Brief
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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