C8051F330 Silicon Laboratories Inc, C8051F330 Datasheet - Page 116

no-image

C8051F330

Manufacturer Part Number
C8051F330
Description
IC 8051 MCU 8K FLASH 20MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Datasheet

Specifications of C8051F330

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F330
Manufacturer:
SILICON
Quantity:
359
Part Number:
C8051F330
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Part Number:
C8051F330-GM
Manufacturer:
SiliconL
Quantity:
6 420
Part Number:
C8051F330-GM
Manufacturer:
SILICON
Quantity:
121
Part Number:
C8051F330-GM
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Part Number:
C8051F330-GM-15T
Manufacturer:
SILICON
Quantity:
3 741
Part Number:
C8051F330-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Part Number:
C8051F330-GMR
0
Company:
Part Number:
C8051F330-GMR
Quantity:
32 000
Part Number:
C8051F330GM
Manufacturer:
SILLAB
Quantity:
4 419
C8051F330/1, C8051F330D
Registers XBR0 and XBR1 are used to assign the digital I/O resources to the physical I/O Port pins. Note
that when the SMBus is selected, the Crossbar assigns both pins associated with the SMBus (SDA and
SCL); when the UART is selected, the Crossbar assigns both pins associated with the UART (TX and RX).
UART0 pin assignments are fixed for bootloading purposes: UART TX0 is always assigned to P0.4; UART
RX0 is always assigned to P0.5. Standard Port I/Os appear contiguously after the prioritized functions
have been assigned.
Important Note: The SPI can be operated in either 3-wire or 4-wire modes, pending the state of the
NSSMD1-NSSMD0 bits in register SPI0CN. According to the SPI mode, the NSS signal may or may not be
routed to a Port pin.
116
SF Signals
PIN I/O
TX0
RX0
SCK
MISO
MOSI
NSS*
SDA
SCL
CP0
CP0A
SYSCLK
CEX0
CEX1
CEX2
ECI
T0
T1
SF Signals
VREF IDA
Port pin potentially available to peripheral
Special Function Signals are not assigned by the crossbar.
When these signals are enabled, the CrossBar must be
manually configured to skip their corresponding port pins.
Figure 14.4. Crossbar Priority Decoder with Crystal Pins Skipped
0
0
1
0
x1
2
1
P0SKIP[7:0]
x2
3
1
P0
4
0
5
0
CNVSTR
6
0
Rev. 1.2
7
0
*NSS is only pinned out in 4-wire SPI Mode
0
0
1
0
2
0
P1SKIP[7:0]
3
0
P1
4
0
5
0
6
0
7
0
P2
0

Related parts for C8051F330