C8051F330 Silicon Laboratories Inc, C8051F330 Datasheet - Page 206

• Manufacturer Part Number: C8051F330
• Description: IC 8051 MCU 8K FLASH 20MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F33xr

Specifications of C8051F330

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

C8051F330/1, C8051F330D
21.
Revision 1.1 to Revision 1.2
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208
Added new part number: C8051F330D.
System Overview: Changed text to support the C8051F330D.
System Overview: Added note that 512 bytes of Flash are reserved.
System Overview, Figure 1.1: Corrected “100 ksps” to “200 ksps” for ADC0 and changed “CNVST” to
“CNVSTR”.
System Overview: Added pinout and package diagrams for the C8051F330D.
ADC0 Chapter, Table 5.1: Updated Temperature Sensor specifications.
ADC0 Chapter, Section 5.3.2: Added note regarding minimum tracking time.
IDA0 Chapter, Table 6.1: Updated IDA0 Specifications.
VREF0 Chapter, Section 7: Changed “bit is forced to logic 1” to “bias is enabled”.
VREF0 Chapter, Figure 7.1: Added Recommended Bypass Capacitors Diagram.
VREF0 Chapter, Table 7.1: Added additional parameters to specification table and changed the head-
ing “Bias Generators” to “Power Specifications”.
CIP-51 Chapter, Section 9.4.1: Added note regarding IDLE mode operation.
Reset Sources Chapter, Section 10.1: Corrected statement about the initial state of the
Flash Chapter, Section 11.3: Revised and Expanded description of Flash security options.
Flash Chapter, Figure 11.1: Removed fill pattern to enhance visibility.
Oscillators Chapter: Removed Equation 13.1, Equation 13.2, and the example in Section 13.1.1.
Oscillators Chapter: Expanded OSCICL register description.
Oscillators Chapter: Changed ‘xxxx’ to ‘vvvv’ in the OSCLCN reset value.
Oscillators Chapter, Section 13.3.1: Added External Crystal Oscillator Connection Diagram (Figure
13.6) and additional steps to the recommended crystal startup procedure.
Oscillators Chapter, Section 13.4: Added Missing Clock Detector recommendation when using an
external oscillator clock source.
Port I/O Chapter, Figure 14.11: Port 1 Register bit names corrected to reflect the correct port.
SMBus Chapter, Figure 15.5: Added additional text to the SMBTOE bit description.
UART0 Chapter, Equation 16.1: Split UART0 Baud Rate equation into two parts.
Timers Chapter, Section 18.3.1: Reference to Timer 3 interrupt enable “IE.5” corrected to “EIE1.7” .
Timers Chapter, Figure 18.20: Reference to “Timer 2 high byte” corrected to “Timer 3 high byte”.
Timers Chapter: All references to “TH2” and “TL2” changed to “TMR2H” and “TMR2L” respectively.
PCA0 Chapter, Figure 19.13: Corrected Bit 0 label from “EECFn” to “ECCFn”.
Document Change List
Rev. 1.2
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DD Monitor.