C8051F330 Silicon Laboratories Inc, C8051F330 Datasheet - Page 146

• Manufacturer Part Number: C8051F330
• Description: IC 8051 MCU 8K FLASH 20MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F33xr

Specifications of C8051F330

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

C8051F330/1, C8051F330D
16.1. Enhanced Baud Rate Generation
The UART0 baud rate is generated by Timer 1 in 8-bit auto-reload mode. The TX clock is generated by
TL1; the RX clock is generated by a copy of TL1 (shown as RX Timer in Figure 16.2), which is not user-
accessible. Both TX and RX Timer overflows are divided by two to generate the TX and RX baud rates.
The RX Timer runs when Timer 1 is enabled, and uses the same reload value (TH1). However, an
RX Timer reload is forced when a START condition is detected on the RX pin. This allows a receive to
begin any time a START is detected, independent of the TX Timer state.
Timer 1 should be configured for Mode 2, 8-bit auto-reload (see
Counter/Timer with Auto-Reload” on page
flows will occur at two times the desired UART baud rate frequency. Note that Timer 1 may be clocked by
one of six sources: SYSCLK, SYSCLK / 4, SYSCLK / 12, SYSCLK / 48, the external oscillator clock / 8, or
an external input T1. For any given Timer 1 clock source, the UART0 baud rate is determined by
Equation 16.1-A and Equation 16.1-B.
Where T1
value). Timer 1 clock frequency is selected as described in
reference for typical baud rates and system clock frequencies is given in Table 16.1 through Table 16.6.
Note that the internal oscillator may still generate the system clock when the external oscillator is driving
Timer 1.
146
CLK
is the frequency of the clock supplied to Timer 1, and T1H is the high byte of Timer 1 (reload
Detected
Start
A)
B)
UartBaudRate
T1_Overflow_Rate
RX Timer
Figure 16.2. UART0 Baud Rate Logic
Timer 1
TH1
TL1
Equation 16.1. UART0 Baud Rate
173). The Timer 1 reload value should be set so that over-
=
Overflow
Overflow
Rev. 1.2
1
-- -
2
×
=
T1_Overflow_Rate
------------------------- -
256 TH1
T1
–
Section “18. Timers” on page
CLK
2
2
UART
Section “18.1.3. Mode 2: 8-bit
RX Clock
TX Clock
171. A quick