C8051F330 Silicon Laboratories Inc, C8051F330 Datasheet - Page 48

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C8051F330

Manufacturer Part Number
C8051F330
Description
IC 8051 MCU 8K FLASH 20MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Datasheet

Specifications of C8051F330

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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C8051F330/1, C8051F330D
5.4.2. Window Detector In Differential Mode
Figure 5.17 shows two example window comparisons for right-justified, differential data, with
ADC0LTH:ADC0LTL = 0x0040 (+64d) and ADC0GTH:ADC0GTH = 0xFFFF (-1d). In differential mode, the
measurable voltage between the input pins is between -VREF and VREF x (511/512). Output codes are
represented as 10-bit 2’s complement signed integers. In the left example, an AD0WINT interrupt will be
generated if the ADC0 conversion word (ADC0H:ADC0L) is within the range defined by
ADC0GTH:ADC0GTL and ADC0LTH:ADC0LTL (if 0xFFFF (–1d) < ADC0H:ADC0L < 0x0040 (64d)). In the
right example, an AD0WINT interrupt will be generated if the ADC0 conversion word is outside of the range
defined
1d) or ADC0H:ADC0L > 0x0040 (+64d)). Figure 5.18 shows an example using left-justified data with the
same comparison values.
48
VREF x (511/512)
VREF x (511/512)
VREF x (64/512)
VREF x (64/512)
VREF x (-1/512)
VREF x (-1/512)
Input Voltage
Input Voltage
(Px.x - Px.x)
(Px.x - Px.x)
-VREF
-VREF
Figure 5.17. ADC Window Compare Example: Right-Justified Differential Data
by
Figure 5.18. ADC Window Compare Example: Left-Justified Differential Data
ADC0H:ADC0L
ADC0H:ADC0L
0xFFFF
0xFFFE
0x7FC0
0x0FC0
0xFFC0
0x01FF
0x0041
0x0040
0x003F
0x0000
0x0200
0x1040
0x1000
0x0000
0xFF80
0x8000
the
ADC0GT
ADC0GTH:ADC0GTL
ADC0GTH:ADC0GTL
ADC0LTH:ADC0LTL
ADC0LTH:ADC0LTL
not affected
not affected
not affected
not affected
AD0WINT
AD0WINT
AD0WINT
AD0WINT
and
AD0WINT=1
AD0WINT=1
ADC0LT
Rev. 1.2
VREF x (511/512)
VREF x (511/512)
VREF x (64/512)
VREF x (64/512)
VREF x (-1/512)
VREF x (-1/512)
Input Voltage
Input Voltage
(Px.x - Px.x)
(Px.x - Px.y)
-VREF
-VREF
registers
ADC0H:ADC0L
ADC0H:ADC0L
0xFFFF
0xFFFE
0x7FC0
0x0FC0
0xFFC0
0x01FF
0x0041
0x0040
0x003F
0x0000
0x0200
0x1040
0x1000
0x0000
0xFF80
0x8000
(if ADC0H:ADC0L < 0xFFFF (-
ADC0GTH:ADC0GTL
ADC0GTH:ADC0GTL
ADC0LTH:ADC0LTL
ADC0LTH:ADC0LTL
not affected
not affected
AD0WINT
AD0WINT
AD0WINT=1
AD0WINT=1
AD0WINT=1
AD0WINT=1

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