M5275EVBE Freescale Semiconductor, M5275EVBE Datasheet - Page 11

• Manufacturer Part Number: M5275EVBE
• Description: MCF5274/75 EVALUATION BO
• Manufacturer: Freescale Semiconductor
• Series: ColdFire®r
• Type: Microprocessorr

Specifications of M5275EVBE

• Contents: Module and Misc Hardware
• Silicon Manufacturer: Freescale
• Core Architecture: Coldfire
• Core Sub-architecture: Coldfire V2
• Silicon Core Number: MCF52
• Silicon Family Name: MCF527x
• Rohs Compliant: Yes
• For Use With/related Products: MCF5274, MCF5275
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.2.1.2
If V
impedance state. There is no limit on how long after V
must power down. V
power down or undesired high current will be in the ESD protection diodes. There are no requirements for
the fall times of the power supplies.
The recommended power down sequence is as follows:
5.3
5.4
5.5
5.6
Freescale Semiconductor
1. Drop V
2. Drop OV
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DD
Place the decoupling capacitors as close to the pins as possible, but they can be outside the footprint
of the package.
0.1 μF and 0.01 μF at each supply input
Use bus buffers on all data/address lines for all off-board accesses and for all on-board accesses
when excessive loading is expected. See electricals.
Use external pull-up resistors on unused inputs. See pin table.
Use a multi-layer board with a separate ground plane.
Place the crystal and all other associated components as close to the EXTAL and XTAL (oscillator
pins) as possible.
Do not run a high frequency trace around crystal circuit.
Ensure that the ground for the bypass capacitors is connected to a solid ground trace.
Tie the ground trace to the ground pin nearest EXTAL and XTAL. This prevents large loop currents
in the vicinity of the crystal.
Tie the ground pin to the most solid ground in the system.
Do not connect the trace that connects the oscillator and the ground plane to any other circuit
element. This tends to make the oscillator unstable.
Tie XTAL to ground when an external oscillator is clocking the device.
is powered down first, then sense circuits in the I/O pads cause all output drivers to be in a high
Decoupling
Buffering
Pull-up Recommendations
Clocking Recommendations
Power Down Sequence
DD
DD
to 0 V.
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 4
/SDV
DD
should not lag OV
DD
/PLLV
DD
supplies.
DD
, SDV
DD
DD
, or PLLV
powers down before OV
DD
going low by more than 0.4 V during
DD
Design Recommendations
, SDV
DD
, or PLLV
DD
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