M5275EVBE Freescale Semiconductor, M5275EVBE Datasheet - Page 43

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M5275EVBE

Manufacturer Part Number
M5275EVBE
Description
MCF5274/75 EVALUATION BO
Manufacturer
Freescale Semiconductor
Series
ColdFire®r
Type
Microprocessorr
Datasheet

Specifications of M5275EVBE

Contents
Module and Misc Hardware
Silicon Manufacturer
Freescale
Core Architecture
Coldfire
Core Sub-architecture
Coldfire V2
Silicon Core Number
MCF52
Silicon Family Name
MCF527x
Rohs Compliant
Yes
For Use With/related Products
MCF5274, MCF5275
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9
Documentation regarding the MCF5275 and their development support tools is available from a local
Freescale distributor, a Freescale semiconductor sales office, the Freescale Literature Distribution Center,
or through the Freescale web address at http://www.freescale.com/coldfire.
10
Table 29
Freescale Semiconductor
Rev. No.
1.1
1.2
1.3
0
1
2
3
4
provides a revision history for this hardware specification.
Documentation
Revision History
Initial release.
Added
Removed duplicate information in the module description sections. The information is all in the Signals
Removed Overview, Features, Signal Descriptions, Modes of Operation, and Address Multiplexing sections. This
Removed list of documentation in
Changed CLKOUT -> PSTCLK in
Table
Table
Added
Added thermal characteristics for 196 MAPBGA in
Updated package dimensions drawing,
Removed second sentence from
Removed third and fourth paragraphs from
Corrected Ordering Information,
Figure
Table
Table
Description Table.
information can be found in the MCF5275 Reference Manual.
site.
B6a, B6b, B6c maximum changed from “0.5t
B7, B7a minimum changed from “0.5t
B9, B11 minimum changed from “1.5” to “1.0”
FECn_RXER, and
FECn_TXEN, FECn_TXER,
FECn_TXEN, FECn_TXER,
10: Update V
13: Timings B6a, B6b, B6c, B7, B7a, B9, B12 updated:
10: Corrected maximum “Input High Voltage 3.3V I/O Pads”, V
10, added PLL supply voltage row
2: Moved PLLV
Figure
Section 5.2.1, “Supply Voltage Sequencing and Separation
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 4
6.
DD
FECn_RXCLK),”
DD
spec from 1.35-1.65 to 1.4-1.6.
from 1.5V to 3.3V supply line and corrected relevant text in sections below table.
Table 29. Document Revision History
FECn_TXCLK),”
FECn_TXCLK),”
Table
Section 8.11.1, “MII Receive Signal Timing (FECn_RXD[3:0], FECn_RXDV,
Section 9,
Section 8.16, “Debug AC Timing
6.
and
Figure
CYC
Substantive Change(s)
Section 8.11.2, “MII Transmit Signal Timing (FECn_TXD[3:0],
Section 8.11.2, “MII Transmit Signal Timing (FECn_TXD[3:0],
“Documentation.”. An up-to-date list is always available on our web
+ 1.5” to “0.5t
6.
CYC
regarding no minimum frequency requirement for TXCLK.
as this feature is not supported on this device.
Table
+ 5” to “0.5t
8.
CYC
+ 1.0”
CYC
Cautions.”
Specifications.”
+ 5.5”
IH
specification.
Documentation
43

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