DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet - Page 34

• Manufacturer Part Number: DK-DEV-4SGX530N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IV GXr
• Type: FPGAr

Specifications of DK-DEV-4SGX530N

• Contents: Board, Cable, Documentation, Power Supply
• For Use With/related Products: Stratix® IV GX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2714

6–10
Figure 6–5. The DDR3 Tab
Stratix IV GX FPGA Development Kit User Guide
The DDR3 Tab
The DDR3 tab allows you to read and write the DDR3 memory on your board.
Figure 6–5
The following sections describe the controls on the DDR3 tab.
Port
The Port control directs communication to one of two DDR3 memory ports on your
board. A 16-bit interface connects to the top bank of the Stratix IV GX FPGA and a 64-
bit interface connects to the bottom banks of the FPGA.
Start
The Start control initiates DDR3 memory transaction performance analysis.
Stop
The Stop control terminates transaction performance analysis.
shows the DDR3 tab.
August 2010 Altera Corporation
Chapter 6: Board Test System
Using the Board Test System