DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet
DK-DEV-4SGX530N
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DK-DEV-4SGX530N Summary of contents
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... Stratix IV GX FPGA Development Board Reference Manual 101 Innovation Drive San Jose, CA 95134 www.altera.com MNL-01043-2.2 Stratix IV GX FPGA Development Board Reference Manual Subscribe ...
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... Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services ...
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... HDMI Video Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–42 SDI Video Input/Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–46 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–48 DDR3 Bottom Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–49 DDR3 Top Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–52 QDRII+ Top Port 2–54 QDRII+ Top Port 2–57 SSRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–59 Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–62 August 2010 Altera Corporation Contents Stratix IV GX FPGA Development Board Reference Manual ...
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... Appendix A. Board Revision History Single-Die Flash Version Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A–1 Engineering Silicon Version Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A–1 Additional Information Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1 How to Contact Altera . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–2 Typographic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–2 Stratix IV GX FPGA Development Board Reference Manual Contents August 2010 Altera Corporation ...
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... The board provides a wide range of peripherals and memory interfaces to facilitate the development of the Stratix IV GX FPGA designs. Two High-Speed Mezzanine Card (HSMC) connectors are available to add additional functionality via a variety of HSMC cards available from both Altera and various partners see a list of the latest HSMC cards available or to download a copy of the HSMC specification, refer to the website ...
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... Four PCI Express LEDs ■ Four Ethernet LEDs ■ Stratix IV GX FPGA Development Board Reference Manual II CPLD EPM2210 System Controller and Flash Fast Passive Parallel TM for use with the Quartus Chapter 1: Overview Board Component Blocks ® II Programmer August 2010 Altera Corporation ...
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... Mbytes DDR3 BOT x1 (LVPECL) REFCLK SMA IN TRIG SMA OUT GigE PHY HDMI TX XCVR x1 SDI TX/TX August 2010 Altera Corporation Port A Port B x64 x1 x1 x24 EP4SGX230KF40 Oscillators 50 M, 100 M, 125 M CPLD x8 Edge 148 M, 155 M, 156 M Stratix IV GX FPGA Development Board Reference Manual 1– ...
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... When handling the board important to observe the following static discharge precaution: c Without proper anti-static handling, the board can be damaged. Therefore, use anti-static handling precautions when touching the board. Stratix IV GX FPGA Development Board Reference Manual Chapter 1: Overview Handling the Board August 2010 Altera Corporation ...
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... Supply” on page 2–64 ■ ■ “Statement of China-RoHS Compliance” on page 2–68 August 2010 Altera Corporation 2. Board Components Figure 2–1 illustrates major component locations and Guide. Stratix IV GX FPGA Development Board Reference Manual Table 2–1 ...
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... Illuminates when the FPGA is configured. Chapter 2: Board Components Board Overview Figure 2–1 HSMC Port B (J2) Power Switch (SW1) DC Input Jack (J4) QDRII+ x18/x18 Top Port 1 (U7) DDR3 x16 Top Port (U14) QDRII+ x18/x18 Top Port 0 (U22) JTAG Connector (J8) Character LCD (J16) August 2010 Altera Corporation ...
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... General user push-button S3, S4, S5 switches SW2 Power monitor rotary switch August 2010 Altera Corporation Description Illuminates during embedded USB-Blaster data transfers. Illuminates when the FPGA configuration from flash fails. Illuminates when 12-V power is present. Shows the connection speed as well as transmit or receive activity. ...
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... Embedded USB-Blaster JTAG for programming the FPGA via a type-B USB cable. RJ-45 connector which provides a 10/100/1000 Ethernet connection via a Marvell 88E1111 PHY and the FPGA-based Altera Triple Speed Ethernet MegaCore function in SGMII mode. 19-pin HDMI connector which provides a HDMI video output 1080i through an AD9889B PHY. Two 75-Ω ...
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... FineLine BGA package. Figure 2–2. EP4SGX230KF40 Device I/O Bank Diagram Number of I/Os Bank Name *Number of Transceiver Channel August 2010 Altera Corporation Total MLAB 18-bit × 18-bit RAM Blocks Multipliers Kbits 4,560 17,133 1288 Manufacturer Altera Corporation EP4SGX230KF40C2N Bank 1A Bank 6A ...
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... The specific I/O resources available in the Stratix IV GX EP4SGX230KF40 device are the same for the Stratix IV GX EP4SGX530KF40 device. MAX II CPLD EPM2210 System Controller The board utilizes the EPM2210 System Controller, an Altera MAX II CPLD, for the following purposes: Stratix IV GX FPGA Development Board Reference Manual ...
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... Table 2–6. MAX II CPLD EPM2210 System Controller Device Pin-Out (Part Schematic Signal I/O Standard Name 2.5-V FSM_A25 2.5-V FSM_A24 2.5-V FSM_A23 2.5-V FSM_A22 August 2010 Altera Corporation SLD-HUB Information Register Decoder Virtual-JTAG Control Register Fast Configuration Downloader EPM2210 EP4SGX230 Pin Number ...
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... H31 FSM bus data P9 G31 FSM bus data R9 N30 FSM bus data T9 M30 FSM bus data T8 D33 FSM bus data N9 C33 FSM bus data C7 N31 FSM bus data Chapter 2: Board Components MAX II CPLD EPM2210 System Controller Description August 2010 Altera Corporation ...
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... FPGA_CONFIG_D6 2.5-V FPGA_CONFIG_D5 2.5-V FPGA_CONFIG_D4 2.5-V FPGA_CONFIG_D3 2.5-V FPGA_CONFIG_D2 2.5-V FPGA_CONFIG_D1 2.5-V FPGA_CONFIG_D0 2.5-V FPGA_DCLK August 2010 Altera Corporation EPM2210 EP4SGX230 Pin Number Pin Number B5 M31 FSM bus data D7 C32 FSM bus data A5 B32 FSM bus data E7 J32 FSM bus data ...
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... Force FPGA configuration push-button switch M9 V34 Reset push-button switch P4 — SRAM mode L14 — SRAM sleep mode G12 — 50 MHz oscillator enable G16 — 100 MHz oscillator enable Chapter 2: Board Components MAX II CPLD EPM2210 System Controller Description August 2010 Altera Corporation ...
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... FPGA Programming over Embedded USB-Blaster The USB-Blaster is implemented using a type-B USB connector (J7), a FTDI USB 2.0 PHY device (U39), and an Altera MAX II CPLD (U30). This allows the configuration of the FPGA using a USB cable directly connected between the USB port on the board (J7) and a USB port running the Quartus II software ...
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... Chapter 2: Board Components Configuration, Status, and Setup Elements ALWAYS 4SGX230 ENABLED FPGA (in chain) JTAG Slave EPM2210 Flash System Memory Controller JTAG Slave Installed HSMC HSMC Port A Card Installed HSMC HSMC Port B Card PCI Express PCI Express Edge Motherboard Connector August 2010 Altera Corporation ...
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... The development board implements the Altera PFL megafunction for flash programming. The PFL megafunction is a block of logic that is programmed into an Altera programmable logic device (FPGA or CPLD). The PFL functions as a utility for writing to a compatible flash device. This pre-built design contains the PFL megafunction that allows you to write either page 0, page 1, or other areas of flash over the USB interface using the Quartus II software ...
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... Chapter 2: Board Components Configuration, Status, and Setup Elements INIT_DONE MSEL3 nSTATUS MSEL2 nCONFIG MSEL1 CONF_DONE MSEL0 nCE 10 kΩ CONF_DONE_LED DATA [7:0] FSM Bus Interface DCLK Address 0x03FF.FFFF 0x03FF.8000 0x03FF.7FFF 0x03FF.0000 0x03FE.FFFF 0x03FE.8000 0x03FE.7FFF 0x03FE.0000 0x03FD.FFFF 0x0282.0000 August 2010 Altera Corporation ...
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... Board Update Portal, refer to the ■ PFL design, refer to the PFL megafunction, refer to ■ II Software. Status Elements The development board includes status LEDs. This section describes the status elements. August 2010 Altera Corporation Name Size (Kbyte) 8,192 8,192 12,288 12,288 32 32 ...
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... Green LED. Illuminates when a heat sink or fan should be installed. Driven by the MAX1619 thermal sensor OVERTEMPn signal. Manufacturer Lumex Inc. SML-LX1206GC-TR Lumex Inc. SML-LX1206USBC-TR Lumex Inc. SML-LX1206USBC-TR Chapter 2: Board Components Configuration, Status, and Setup Elements Manufacturer Manufacturer Part Number Website www.lumex.com www.lumex.com www.lumex.com August 2010 Altera Corporation ...
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... DIP switch component reference and manufacturing information. Table 2–12. Board Settings DIP Switch Component Reference and Manufacturing Information Board Reference Description Eight-Position SW4 slide DIP switch August 2010 Altera Corporation Description Manufacturer Manufacturer Part Number C & K Components TDA08H0SB1 Stratix IV GX FPGA Development Board Reference Manual 2– ...
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... Description ON : Enable x1 presence detect OFF : Disable x1 presence detect ON : Enable x4 presence detect OFF : Disable x4 presence detect ON : Enable x8 presence detect OFF : Disable x8 presence detect Reserved Chapter 2: Board Components Configuration, Status, and Setup Elements Default Manufacturer Website www.ck-components.com Default OFF August 2010 Altera Corporation ...
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... Table 2–18. Power Rail Measurements Based on the Rotary Switch Position (Part Switch Schematic Signal Name 0 S4VCCIO_B7B8 1 S4VCC 2 3.3 V August 2010 Altera Corporation Manufacturer Manufacturer Part Number C & K Components TDA04H0SB1 Manufacturer Manufacturer Panasonic Corporation EVQPAC07K ...
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... Bank 4 I/O power (DDR3BOT) VCCR XCVR analog receive 1.1 VCCT XCVR analog transmit VCCL_GXB XCVR clock distribution 12 — All 12 V power Manufacturer Manufacturer Grayhill Corporation 94HCB16WT Chapter 2: Board Components Clock Circuitry Description clock input pins Manufacturer Part Number Website www.grayhill.com August 2010 Altera Corporation ...
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... M* REFCLK INPUT LVPECL or Single-Ended *The 100 MHz oscillator (X6) can be programmed to any frequency between 10 MHz and 800 MHz but powers up to 100 MHz using the clock control GUI installed with the kit CD. August 2010 Altera Corporation PLL PLL R4 R3 CLK7p B5 PLL ...
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... AA2 LVDS 148.5 MHz oscillator which drives the transceiver reference clock input with 100 Ω AL2 LVDS Chapter 2: Board Components Clock Circuitry QR2 QL2 Description on-chip termination (OCT). clock input with parallel OCT. OCT. OCT. August 2010 Altera Corporation ...
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... Samtec HSMC HSMB_CLK_IN_N1 HSMB_CLK_IN_P2 Samtec HSMC HSMB_CLK_IN_N2 PCIE_REFCLK_P PCI Express Edge PCIE_REFCLK_N August 2010 Altera Corporation Pin I/O Standard 155.52 MHz oscillator which drives the transceiver reference clock input with 100 Ω J38 LVPECL 50 MHz oscillator which drives the global AC34 2 ...
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... HSTL Class I, 50 Ω OCT QDR2_TOP1_K_N 1.5V HSTL Class I, 50 Ω OCT DDR3TOP_CK_P SSTL-15 Class I, 50 Ω OCT DDR3TOP_CK_N SSTL-15 Class I, 50 Ω OCT QDR2_TOP0_K_P 1.5V HSTL Class I, 50 Ω OCT QDR2_TOP0_K_N 1.5V HSTL Class I, 50 Ω OCT Description August 2010 Altera Corporation ...
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... Stratix IV GX device. When the switch is pressed and held down, the device pin is set to logic 0; when the switch is released, the device pin is set to logic 1. There is no board-specific function for these general user push-button switches. August 2010 Altera Corporation Pin I/O Standard K8 LVDS or 2 ...
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... Chapter 2: Board Components General User Input/Output Stratix IV GX Device I/O Standard Pin Number V34 M34 2.5-V W32 AK35 Manufacturer Website www.panasonic.com Stratix IV GX Device I/O Standard Pin Number AL35 AC35 J34 AN35 2.5-V G33 K35 AG34 AG31 August 2010 Altera Corporation ...
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... Driving a logic 0 on the I/O D16 port turns the LED ON. Driving D13 a logic 1 on the I/O port turns the LED OFF. D12 D11 D10 August 2010 Altera Corporation Manufacturer Manufacturer Part Number C & K Components TDA08H0SB1 2–15. Schematic I/O Standard Signal Name USR_LED0 USR_LED1 USR_LED2 ...
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... Schematic I/O Standard Signal Name HSMA_TX_LED HSMA_RX_LED 2.5-V HSMB_TX_LED HSMB_RX_LED Manufacturer Manufacturer Part Number Lumex Inc. SML-LX1206GC-TR Chapter 2: Board Components General User Input/Output Manufacturer Website www.lumex.com Stratix IV GX Device Pin Number D5 C6 AH33 AT10 Manufacturer Website www.lumex.com August 2010 Altera Corporation ...
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... Number R 7–14 DB0–DB7 1 The particular model used does not have a backlight and the LCD drive pin is not connected. August 2010 Altera Corporation Schematic Signal Name LCD_DATA0 LCD_DATA1 LCD_DATA2 LCD_DATA3 LCD_DATA4 LCD_DATA5 LCD_DATA6 LCD_DATA7 LCD_D_Cn LCD_Wen LCD_CSn Symbol Level — DD — ...
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... The I/O standard is High-Speed Current Steering Logic (HCSL). Stratix IV GX FPGA Development Board Reference Manual Manufacturer Samtec TSM-107-01-G-DV Lumex Inc. LCM-S01602DSR/C Guide. Chapter 2: Board Components Components and Interfaces Manufacturer Manufacturer Part Number Website www.samtec.com www.lumex.com PCI Express August 2010 Altera Corporation ...
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... J17.B45 Add-in card receive bus J17.B46 Add-in card receive bus J17.B41 Add-in card receive bus J17.B42 Add-in card receive bus J17.B37 Add-in card receive bus August 2010 Altera Corporation = 1.15 V REFCLK – = 550 mV = 250 mV REFCLK + = –0.30 V MIN Schematic Signal Name PCIE_TX_P7 ...
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... PCIE_RX_N3 1.4-V PCML PCIE_RX_P2 PCIE_RX_N2 PCIE_RX_P1 PCIE_RX_N1 PCIE_RX_P0 PCIE_RX_N0 PCIE_REFCLK_P HCSL PCIE_REFCLK_N PCIE_PERSTn PCIE_WAKEn LVTTL PCIE_SMBCLK PCIE_SMBDAT August 2010 Altera Corporation Components and Interfaces Stratix IV GX Device Pin Number AC39 AE38 AE39 AG38 AG39 AJ38 AJ39 AR38 AR39 AU38 AU39 AN38 ...
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... These HSMC interfaces support both single-ended and differential signaling. The HSMC interface also allows JTAG, SMB, clock outputs and inputs, as well as power for compatible HSMC cards. The HSMC is an Altera-developed open specification, which allows you to expand the functionality of the development board through the addition of daughtercards ...
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... LVDS CLKIN2, CLKOUT2 Bank 2 Power D(39:0) -or- D[3:0] + LVDS CLKIN1, CLKOUT1 Bank Channels CDR 8 RX Channels CDR JTAG SMB CLKIN0, CLKOUT0 High Speed Mezzanine Card (HSMC) Specification Chapter 2: Board Components Components and Interfaces High manual, LVDS and August 2010 Altera Corporation ...
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... J1.26 Transceiver RX bit 1 J1.27 Transceiver TX bit 1n J1.28 Transceiver RX bit 1n J1.29 Transceiver TX bit 0 J1.30 Transceiver RX bit 0 J1.31 Transceiver TX bit 0n J1.32 Transceiver RX bit 0n August 2010 Altera Corporation Schematic Signal I/O Standard Name HSMA_TX_P7 HSMA_RX_P7 HSMA_TX_N7 HSMA_RX_N7 HSMA_TX_P6 HSMA_RX_P6 HSMA_TX_N6 HSMA_RX_N6 HSMA_TX_P5 HSMA_RX_P5 HSMA_TX_N5 ...
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... HSMA_TX_D_N2 HSMA_RX_D_N2 HSMA_TX_D_P3 LVDS or 2.5-V HSMA_RX_D_P3 HSMA_TX_D_N3 HSMA_RX_D_N3 HSMA_TX_D_P4 HSMA_RX_D_P4 HSMA_TX_D_N4 HSMA_RX_D_N4 HSMA_TX_D_P5 HSMA_RX_D_P5 HSMA_TX_D_N5 HSMA_RX_D_N5 HSMA_TX_D_P6 HSMA_RX_D_P6 August 2010 Altera Corporation Stratix IV GX Device Pin Number AJ11 L11 — — — — AM29 AB34 AW10 AV10 AW7 AV7 AN9 AT9 ...
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... LVDS RX bit 13n or CMOS bit 63 J1.137 LVDS TX bit 14 or CMOS bit 64 J1.138 LVDS RX bit 14 or CMOS bit 65 J1.139 LVDS TX bit 14n or CMOS bit 66 J1.140 LVDS RX bit 14n or CMOS bit 67 August 2010 Altera Corporation Schematic Signal I/O Standard Name HSMA_TX_D_N6 HSMA_RX_D_N6 HSMA_TX_D_P7 HSMA_RX_D_P7 HSMA_TX_D_N7 ...
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... I/O Standard Name HSMB_TX_P7 HSMB_RX_P7 HSMB_TX_N7 HSMB_RX_N7 HSMB_TX_P6 HSMB_RX_P6 HSMB_TX_N6 HSMB_RX_N6 1.4-V PCML HSMB_TX_P5 HSMB_RX_P5 HSMB_TX_N5 HSMB_RX_N5 HSMB_TX_P4 HSMB_RX_P4 HSMB_TX_N4 August 2010 Altera Corporation Stratix IV GX Device Pin Number AB11 AG6 AB10 AG5 AC11 AB9 AC10 AC8 AF13 AF6 AG13 AE5 AG12 D5 ...
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... LVDS TX bit 1 or CMOS bit 8 J2.54 LVDS RX bit 1 or CMOS bit 9 J2.55 LVDS TX bit 1n or CMOS bit 10 J2.56 LVDS RX bit 1n or CMOS bit 11 J2.59 LVDS TX bit 2 or CMOS bit 12 August 2010 Altera Corporation Schematic Signal I/O Standard Name HSMB_RX_N4 HSMB_TX_P3 HSMB_RX_P3 HSMB_TX_N3 HSMB_RX_N3 ...
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... HSMB_TX_D_N5 HSMB_RX_D_N5 HSMB_TX_D_P6 HSMB_RX_D_P6 HSMB_TX_D_N6 HSMB_RX_D_N6 LVDS or 2.5-V HSMB_TX_D_P7 HSMB_RX_D_P7 HSMB_TX_D_N7 HSMB_RX_D_N7 HSMB_CLK_OUT_P1 HSMB_CLK_IN_P1 HSMB_CLK_OUT_N1 HSMB_CLK_IN_N1 HSMB_TX_D_P8 HSMB_RX_D_P8 HSMB_TX_D_N8 HSMB_RX_D_N8 HSMB_TX_D_P9 HSMB_TX_D_P9 HSMB_RX_D_N9 HSMB_RX_D_N9 HSMB_TX_D_P10 HSMB_RX_D_P10 HSMB_TX_D_N10 August 2010 Altera Corporation Stratix IV GX Device Pin Number U10 T10 N6 R10 N11 K6 N10 ...
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... LVDS or CMOS clock CMOS bit 79 J2.160 HSMC Port B presence detect User LED to show RX data activity on D15 HSMC Port B User LED to show TX data activity on HSMC D14 Port B August 2010 Altera Corporation Schematic Signal I/O Standard Name HSMB_RX_D_N10 HSMB_TX_D_P11 HSMB_RX_D_P11 HSMB_TX_D_N11 HSMB_RX_D_N11 HSMB_TX_D_P12 ...
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... HDCP EEPROM installed by default. The on-chip MPU, accessible from the FPGA through the serial port, reports HDMI events through interrupts and registers. Stratix IV GX FPGA Development Board Reference Manual Chapter 2: Board Components Components and Interfaces Manufacturing Manufacturer Part Number Samtec ASP-122953-01 2 ® C master to perform August 2010 Altera Corporation Manufacturer Website www.samtec.com ...
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... AD9889B HDMI transmitter device. Figure 2–12. AD9889B HDMI Transmitter Device Block Diagram CLK VSYNC HSYNC DE D [23:0] S/PDIF MCLK [3:0] LRCLK SCLK August 2010 Altera Corporation MCL MDA SDA SCL Slave HDCP Core Register Configuration Logic Video Data ...
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... Chapter 2: Board Components Schematic Signal I/O Standard Name HDMI_D0 HDMI_D1 HDMI_D2 HDMI_D3 HDMI_D4 1.8-V HDMI_D5 HDMI_D6 HDMI_D7 HDMI_D8 HDMI_D9 HDMI_D10 August 2010 Altera Corporation Components and Interfaces Stratix IV GX Device Pin Number AW34 AL25 AK25 AP26 AH26 AM26 AK26 AN26 AP27 AN27 AV28 ...
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... Table 2–41 lists the HDMI video output component reference and manufacturing information. Table 2–41. HDMI Video Output Connector Component Reference and Manufacturing Information Board Reference Description U25 HDMI transmitter August 2010 Altera Corporation Schematic Signal I/O Standard Name HDMI_D11 HDMI_D12 HDMI_D13 HDMI_D14 ...
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... Supported Output Standards SMPTE 424M, SMPTE 292M SMPTE 259M Schematic I/O Standard Signal Name SDI_TX_P 1.4-V PCML SDI_TX_N SDI_TX_EN SDI_TX_SD_HDn Chapter 2: Board Components Components and Interfaces Rise TIme Faster Slower Stratix IV GX Device Pin Number 2.5-V V29 August 2010 Altera Corporation ...
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... Stratix IV GX FPGA. Table 2–45. SDI Video Input Interface Pin Assignments, Schematic Signal Names, and Functions (Part Board Description Reference U2.11 SDI video input P U2.10 SDI video input N August 2010 Altera Corporation Ω ENABLE SD/HD SDI SDO LMH0302 ...
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... SDI 1.0 μF SDI 75 Ω 37.4 Ω MUTE MUTE REF BYPASS 1.0 μF Chapter 2: Board Components Memory Stratix IV GX Device Pin Number Pin Number T4 — — M6 (Automatically driven by carrier detect) SDO To FPGA SDO CD CD External Memory August 2010 Altera Corporation ...
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... U5, U12, U18, U24 pin M3 Bank address bus U5, U12, U18, U24 pin M3 Bank address bus U5, U12, U18, U24 pin M3 Bank address bus U5, U12, U18, U24 pin J3 Row address select August 2010 Altera Corporation Schematic Signal I/O Standard Name DDR3BOT_A14 DDR3BOT_A13 DDR3BOT_A12 DDR3BOT_A11 ...
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... DDR3BOT_DQ10 DDR3BOT_DQ11 DDR3BOT_DQ12 DDR3BOT_DQ13 DDR3BOT_DQ14 DDR3BOT_DQ15 DDR3BOT_DM1 DDR3BOT_DQS_P1 DDR3BOT_DQS_N1 DDR3BOT_DQ16 DDR3BOT_DQ17 DDR3BOT_DQ18 DDR3BOT_DQ19 DDR3BOT_DQ20 DDR3BOT_DQ21 DDR3BOT_DQ22 DDR3BOT_DQ23 DDR3BOT_DM2 August 2010 Altera Corporation Memory Stratix IV GX Device Pin Number AV19 AN20 AW20 AU20 AW19 AE20 AF20 AM14 AM13 AN14 AL14 AR14 AN13 ...
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... U18.C7 Data strobe P byte lane 5 U18.B7 Data strobe N byte lane 5 U24.E3 Data bus byte lane 6 U24.F7 Data bus byte lane 6 U24.F2 Data bus byte lane 6 August 2010 Altera Corporation Schematic Signal I/O Standard Name DDR3BOT_DQS_P2 DDR3BOT_DQS_N2 DDR3BOT_DQ24 DDR3BOT_DQ25 DDR3BOT_DQ26 DDR3BOT_DQ27 DDR3BOT_DQ28 ...
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... SSTL Class I DDR3BOT_DQ57 DDR3BOT_DQ58 DDR3BOT_DQ59 DDR3BOT_DQ60 DDR3BOT_DQ61 DDR3BOT_DQ62 DDR3BOT_DQ63 DDR3BOT_DM7 DDR3BOT_DQS_P7 DDR3BOT_DQS_N7 Manufacturing Manufacturer Part Number Micron MT41J64M16LA-15E August 2010 Altera Corporation Memory Stratix IV GX Device Pin Number AN25 AR25 AP24 AP25 AW26 AN24 AT26 AU26 AJ23 AK24 AF23 AH23 ...
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... U14.H3 Data bus byte lane 0 U14.H8 Data bus byte lane 0 U14.G2 Data bus byte lane 0 U14.H7 Data bus byte lane 0 U14.E7 Write mask byte lane 0 August 2010 Altera Corporation Schematic Signal I/O Standard Name DDR3TOP_A14 DDR3TOP_A13 DDR3TOP_A12 DDR3TOP_A11 DDR3TOP_A10 DDR3TOP_A9 DDR3TOP_A8 ...
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... DDR3TOP_DQ9 DDR3TOP_DQ10 DDR3TOP_DQ11 1.5-V SSTL Class I DDR3TOP_DQ12 DDR3TOP_DQ13 DDR3TOP_DQ14 DDR3TOP_DQ15 DDR3TOP_DM1 DDR3TOP_DQS_P1 DDR3TOP_DQS_N1 Manufacturing Manufacturer Part Number Micron MT41J64M16LA-15E August 2010 Altera Corporation Memory Stratix IV GX Device Pin Number D14 C14 K22 D22 J22 E22 G22 F23 H22 D23 G23 J23 ...
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... Write data bus U22.D11 Write data bus U22.E10 Write data bus U22.G11 Write data bus U22.J11 Write data bus U22.K10 Write data bus August 2010 Altera Corporation I/O Standard Schematic Signal Name QDR2TOP0_A19 QDR2TOP0_A18 QDR2TOP0_A17 QDR2TOP0_A16 QDR2TOP0_A15 QDR2TOP0_A14 QDR2TOP0_A13 QDR2TOP0_A12 QDR2TOP0_A11 ...
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... Stratix IV GX Device Pin Number E25 G25 F25 P23 N23 K24 L23 J25 A22 M25 L25 N25 P25 G27 F27 D28 E28 D29 E29 F28 G29 J26 K26 J27 L26 K28 M27 H28 K27 C27 H26 B22 August 2010 Altera Corporation ...
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... Address bus U7.N6 Address bus U7.N5 Address bus U7.C7 Address bus U7.C5 Address bus U7.B8 Address bus U7.B4 Address bus August 2010 Altera Corporation Manufacturing Manufacturer Part Number Cypress CY7C2563KV18-400BZXC NEC uPD44647186AF5-E22-FQ1 Samsung K7S3218U4C-EC40 I/O Standard Schematic Signal Name QDR2TOP1_A19 QDR2TOP1_A18 ...
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... C17 G15 F15 E16 D16 C15 C16 B16 A16 G16 G17 J16 K16 L16 P17 K17 N17 M17 P16 N16 M16 D18 H17 J17 C20 N13 N15 R14 P14 M14 N14 M13 K14 L14 E14 F14 F12 August 2010 Altera Corporation ...
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... The theoretical bandwidth of this 32-bit memory interface is 8.0 Gbps for continuous bursts. The read latency for any address is two clocks, in which at 250 MHz, the latency and at 50 MHz, the latency is 40 ns. The write latency is one clock. August 2010 Altera Corporation I/O Standard Schematic Signal Name QDR2TOP1_Q5 ...
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... Pin Number AP30 AN30 AL31 AK31 AR32 AP32 AH29 AG29 AR35 AP35 AL32 AK32 AU33 AT33 AH30 AJ31 AR34 AT34 AE27 AD27 AP34 AN33 AD26 AC26 T28 R28 F32 E32 L31 K31 F31 E31 N29 M29 H31 August 2010 Altera Corporation ...
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... Byte lane 3 write enable U30.A7 Byte write enable U30.B7 Global write enable U30.A8 Address status controller U30.B9 Address status processor U30.A9 Address valid August 2010 Altera Corporation I/O Standard Schematic Signal Name FSM_D20 FSM_D19 FSM_D18 FSM_D17 FSM_D16 FSM_D15 FSM_D14 FSM_D13 FSM_D12 ...
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... Stratix IV GX FPGA Development Board Reference Manual I/O Standard Schematic Signal Name SRAM_MODE 2.5-V SRAM_ZZ Manufacturing Manufacturer Part Number ISSI Inc. IS61VPS51236A-250B3 Chapter 2: Board Components Memory Stratix IV GX Device Pin Number — (Connects to the MAX II CPLD EPM2210 System Controller) AJ29 Manufacturer Website www.issi.com August 2010 Altera Corporation ...
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... U32.F5 Data bus U32.F4 Data bus U32.F3 Data bus U32.E3 Data bus U32.E1 Data bus U32.H7 Data bus U32.G6 Data bus August 2010 Altera Corporation I/O Standard Schematic Signal Name FSM_A25 FSM_A24 FSM_A23 FSM_A22 FSM_A21 FSM_A20 FSM_A19 FSM_A18 FSM_A17 FSM_A16 FSM_A15 ...
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... FLASH_RESETn FLASH_CEn FLASH_OEn FLASH_ADVn FLASH_RDYBSYn Manufacturing Manufacturer Part Number Numonyx PC28F512P30BF Chapter 2: Board Components Power Supply Stratix IV GX Device Pin Number M28 D31 C31 K30 J30 D34 C34 AF26 AL30 AU31 AG27 AN31 AT32 Manufacturer Website www.numonyx.com August 2010 Altera Corporation ...
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... OSC, AT93C46DN EEPROM 12V_PCIe (5.75 A with full HSMCs) 3.74 A U35 DC INPUT LTM3727 Dual Switching Regulator 3.3V_PCIe (4.77 A with full HSMCs) 0.69 A August 2010 Altera Corporation 2.095 A U8 LTM4601 2.5 V Switching 10.13 A 0.837 A Regulator U49 LT3025-1 Linear 0.080 A 0.100 A BEAD 0.080 A ...
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... Bank 7 I/O power (QDR2TOP+DDR3TOP) Bank 8 I/O power (QDR2TOP+DDR3TOP) FPGA core and periphery power PCI Express hard IP block All 3.3 V power to board (mA only) I/O pre-drivers Configuration I/O V clock input pins IO XCVR clock buffers Programmable power tech auxiliary PLL analog August 2010 Altera Corporation ...
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... MAX1619 device with the FAN_FORCE_ON DIP switch to force the fan constantly at full speed. For more information on this control, refer to the MAX II EPM2210 System Controller source code found in the development board installation directory <install dir>\stratixIVGX_4sgx230_fpga \examples\max2. August 2010 Altera Corporation Voltage (V) Device Pin 1.5 ...
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... MAX1619MEE+T Notes (1), Hexavalent Cadmium Mercury Polybrominated Chromium (Cd) (Hg) biphenyls (PBB) (Cr6 Chapter 2: Board Components Statement of China-RoHS Compliance Stratix IV GX System Controller Device Pin Number Pin Number R1 W34 R4 AH32 P5 — M2 — Manufacturer Website www.maxim-ic.com (2) Polybrominated diphenyl Ethers (PBDE August 2010 Altera Corporation ...
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... The engineering silicon version of the Stratix IV GX FPGA development board is the initial release of the board. This section describes the differences between the engineering silicon and production silicon versions of the board. August 2010 Altera Corporation A. Board Revision History Description Replaced Intel dual-die 512-Mb flash PC48F4400P0VB00 with ■ ...
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... FSM BUS FPGA FLASH SRAM PFL GPIO MAX II Device Table 2–58 on Description FPGA core and periphery power PCI Express hard IP block PLL digital XCVR analog TX/RX driver (mA only) XCVR analog receive XCVR analog transmit XCVR clock distribution August 2010 Altera Corporation ...
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... Table A–3. Crystal Oscillator Component Reference and Manufacturing Information Board Description Reference X6 100 MHz LVDS Saw Oscillator August 2010 Altera Corporation shows the production silicon component references. Manufacturer Manufacturer Part Number Epson EG-2121CA 100.0000M-LHPNL3 Stratix IV GX FPGA Development Board Reference Manual A– ...
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... A–4 Stratix IV GX FPGA Development Board Reference Manual Appendix A: Board Revision History Engineering Silicon Version Differences August 2010 Altera Corporation ...
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... This chapter provides additional information about the document and Altera. Document Revision History The following table shows the revision history for this document. Date Version Updated the manufacturing part number of the flash device in ■ August 2010 2.2 Converted document to new frame template and made textual and style changes. ...
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... Technical training Product literature Non-technical support (General) (Software Licensing) Note to Table: (1) You can also contact your local Altera sales office or sales representative. Typographic Conventions The following table shows the typographic conventions this document uses. Visual Cue Bold Type with Initial Capital ...
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... A warning calls attention to a condition or possible situation that can cause you injury. The envelope links to the Email Subscription Management Center website, where you can sign up to receive update notifications for Altera documents. Stratix IV GX FPGA Development Board Reference Manual Info–3 page of the Altera ...
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... Info–4 Stratix IV GX FPGA Development Board Reference Manual Additional Information Typographic Conventions August 2010 Altera Corporation ...