DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet - Page 53

• Manufacturer Part Number: DK-DEV-4SGX530N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IV GXr
• Type: FPGAr

Specifications of DK-DEV-4SGX530N

• Contents: Board, Cable, Documentation, Power Supply
• For Use With/related Products: Stratix® IV GX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2714

Appendix A
Restoring the MAX II CPLD to the Factory Settings
Restoring the MAX II CPLD to the Factory Settings
August 2010 Altera Corporation
f
f
9. Using the Quartus II Programmer, click Add File and select
10. Turn on the Program/Configure option for the added file.
11. Click Start to download the selected configuration file to the FPGA. Configuration
12. Cycle the POWER switch (SW1) off then on to load and run the restored factory
13. The restore script cannot restore the board’s MAC address automatically. In the
To ensure that you have the most up-to-date factory restore files and information
about this product, refer to the
Altera website.
This section describes how to restore the original factory contents to the MAX II CPLD
on the FPGA development board. Make sure you have the Nios II EDS installed, and
perform the following instructions:
1. Set the board switches to the factory default settings described in
2. Launch the Quartus II Programmer.
3. Click Auto Detect.
4. Click Add File and select
5. Turn on the Program/Configure option for the added file.
6. Click Start to download the selected configuration file to the MAX II CPLD.
To ensure that you have the most up-to-date factory restore files and information
about this product, refer to the
Altera website.
<install dir>\kits\stratixIVGX_4sgx230_fpga\factory_recovery\s4sgx230_fpga_
bup.sof.
is complete when the progress bar reaches 100%. The CONF DONE LED (D5) and
the eight lower user LEDs (D16-D23) illuminate indicating the flash memory
device is now restored with the factory contents.
design.
Nios II command shell, type the following Nios II EDS command:
nios2-terminal r
and follow the instructions in the terminal window to generate a unique MAC
address.
Switch Settings” on page
1
<install dir>\kits\stratixIVGX_4sgx230_fpga\factory_recovery\max2.pof.
Configuration is complete when the progress bar reaches 100%.
Setting DIP switch SW6.1 to the off position includes the MAX II device in
the JTAG chain.
4–2.
Stratix IV GX FPGA Development Kit
Stratix IV GX FPGA Development Kit
Stratix IV GX FPGA Development Kit User Guide
“Factory Default
page of the
page of the
A–5