DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet - Page 47

• Manufacturer Part Number: DK-DEV-4SGX530N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IV GXr
• Type: FPGAr

Specifications of DK-DEV-4SGX530N

• Contents: Board, Cable, Documentation, Power Supply
• For Use With/related Products: Stratix® IV GX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2714

Chapter 6: Board Test System
The Clock Control
August 2010 Altera Corporation
f
f
The Clock Control communicates with the MAX II device on the board through the
JTAG bus. The Si570 programmable oscillator is connected to the MAX II device
through a 2-wire serial bus.
Figure 6–11. The Clock Control
The following sections describe the Clock Control controls.
Serial Port Registers
The Serial port registers control shows the current values from the Si570 registers.
For more information about the Si570 registers, refer to the Si570/Si571 datasheet
available on the Silicon Labs website (www.silabs.com).
fXTAL
The fXTAL control shows the calculated internal fixed-frequency crystal based on the
serial port register values.
For more information about the f
Si570/Si571 datasheet available on the Silicon Labs website (www.silabs.com).
Disable Oscillator
The Disable oscillator enables and disables the Si570 output buffer. Turn on Disable
oscillator to power down the Si570 output buffer. Turn off the Disable oscillator to
drive the Si570 output buffer normally.
Figure 6–11
XTAL
value and how it is calculated, refer to the
shows the Clock Control.
Stratix IV GX FPGA Development Kit User Guide
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