A000046 Arduino, A000046 Datasheet - Page 308

• Manufacturer Part Number: A000046
• Description: MCU, MPU & DSP Development Tools Uno
• Manufacturer: Arduino
• Series: -r
• Type: MCUr

Specifications of A000046

• Processor To Be Evaluated: ATmega328
• Interface Type: USB, I2C, SPI
• Dimensions: 2.7 in x 2.1 in
• Operating Supply Voltage: 5 V
• Contents: Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega328

27.7.14
27.7.15
27.8
8161D–AVR–10/09
Serial Downloading
Reading the Calibration Byte
Parallel Programming Characteristics
The algorithm for reading the Calibration byte is as follows (refer to
page 302
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte, 0x00.
3. Set OE to “0”, and BS1 to “1”. The Calibration byte can now be read at DATA.
4. Set OE to “1”.
For chracteristics of the Parallel Programming, see
page
Both the Flash and EEPROM memory arrays can be programmed using the serial SPI bus while
RESET is pulled to GND. The serial interface consists of pins SCK, MOSI (input) and MISO (out-
put). After RESET is set low, the Programming Enable instruction needs to be executed first
before program/erase operations can be executed. NOTE, in
mapping for SPI programming is listed. Not all parts use the SPI pins dedicated for the internal
SPI interface.
Figure 27-7. Serial Programming and Verify
Notes:
When programming the EEPROM, an auto-erase cycle is built into the self-timed programming
operation (in the Serial mode ONLY) and there is no need to first execute the Chip Erase
instruction. The Chip Erase operation turns the content of every memory location in both the
Program and EEPROM arrays into 0xFF.
Depending on CKSEL Fuses, a valid clock must be present. The minimum low and high periods
for the serial clock (SCK) input are defined as follows:
Low: > 2 CPU clock cycles for f
High: > 2 CPU clock cycles for f
324.
1. If the device is clocked by the internal Oscillator, it is no need to connect a clock source to the
2. V
for details on Command and Address loading):
XTAL1 pin.
CC
- 0.3V <
AV
CC
< V
MOSI
MISO
SCK
ck
ck
CC
< 12 MHz, 3 CPU clock cycles for f
< 12 MHz, 3 CPU clock cycles for f
ATmega48PA/88PA/168PA/328P
+ 0.3V, however,
XTAL1
RESET
GND
(1)
AV
”Parallel Programming Characteristics” on
CC
AVCC
VCC
should always be within 1.8 - 5.5V
+1.8 - 5.5V
+1.8 - 5.5V
Table 27-17 on page
(2)
”Programming the Flash” on
ck
ck
>= 12 MHz
>= 12 MHz
309, the pin
308