MPC8536BVTATH Freescale Semiconductor, MPC8536BVTATH Datasheet - Page 44

Microprocessors (MPU) 8536 INDUSTRIAL 1250

MPC8536BVTATH

Manufacturer Part Number
MPC8536BVTATH
Description
Microprocessors (MPU) 8536 INDUSTRIAL 1250
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8536BVTATH

Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
1250 MHz
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
0 C
Package / Case
FCPBGA-783
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8536BVTATHA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
Figure 16
2.9.2.2.2
Table 29
Figure 17
44
At recommended operating conditions with L/TV
RX_CLK clock period
RX_CLK duty cycle
RXD[7:0], RX_DV, RX_ER setup time to RX_CLK
RXD[7:0], RX_DV, RX_ER hold time to RX_CLK
RX_CLK clock rise (20%-80%)
RX_CLK clock fall time (80%-20%)
Note:
1. The symbols used for timing specifications herein follow the pattern of t
for inputs and t
receive timing (GR) with respect to the time data input signals (D) reaching the valid state (V) relative to the t
reference (K) going to the high state (H) or setup time. Also, t
time data input signals (D) went invalid (X) relative to the t
that, in general, the clock reference symbol representation is based on three letters representing the clock of a particular
functional. For example, the subscript of t
convention is used with the appropriate letter: R (rise) or F (fall).
provides the GMII receive AC timing specifications.
provides the AC test load for eTSEC.
shows the GMII transmit AC timing diagram.
GMII Receive AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
GTX_CLK
Parameter/Condition
TXD[7:0]
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
TX_EN
TX_ER
Output
Table 29. GMII Receive AC Timing Specifications
Figure 16. GMII Transmit AC Timing Diagram
t
t
GTXH
GTKHDV
DD
GRX
Figure 17. eTSEC AC Test Load
of 3.3 V ± 5%.
t
GTX
Z
represents the GMII (G) receive (RX) clock. For rise and fall times, the latter
0
= 50 Ω
GRX
GRDXKL
t
clock reference (K) going to the low (L) state or hold time. Note
Symbol
GRXH
t
t
t
GRDVKH
GRDXKH
GTXF
t
t
t
GRXR
GRXF
GRX
/t
t
GTKHDX
symbolizes GMII receive timing (GR) with respect to the
GRX
for outputs. For example, t
(first two letters of functional block)(signal)(state) (reference)(state)
1
R
L
t
GTXR
= 50 Ω
Min
2.0
35
0
LV
DD
Typ
8.0
/2
GRDVKH
Freescale Semiconductor
symbolizes GMII
Max
1.0
1.0
65
RX
clock
Unit
ns
ns
ns
ns
ns
ns

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