A2F500M3G-FGG484 Actel, A2F500M3G-FGG484 Datasheet - Page 112

• Manufacturer Part Number: A2F500M3G-FGG484
• Description: FPGA - Field Programmable Gate Array 500K System Gates
• Manufacturer: Actel

Specifications of A2F500M3G-FGG484

• Processor Series: A2F500
• Core: ARM Cortex M3
• Number Of Logic Blocks: 24
• Maximum Operating Frequency: 100 MHz
• Number Of Programmable I/os: 204
• Data Ram Size: 64 KB
• Delay Time: 50 ns
• Supply Voltage (max): 3.6 V
• Supply Current: 2 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.5 V
• Number Of Gates: 500000
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Descriptions
5 - 2
Name
VCC15A
VCC15ADC0
VCC15ADC1
VCC15ADC2
VCC33A
VCC33ADC0
VCC33ADC1
VCC33ADC2
VCC33AP
VCC33N
VCC33SDD0
VCC33SDD1
VCCENVM
VCCESRAM
VCCFPGAIOB0
VCCFPGAIOB1
VCCFPGAIOB5
VCCLPXTAL
Notes:
1. The following 3.3 V supplies should be connected together while following proper noise filtering practices: VCC33A,
2. The following 1.5 V supplies should be connected together while following proper noise filtering practices: VCC,
VCC33ADCx, VCC33AP, VCC33SDDx, VCCMAINXTAL, and VCCLPXTAL.
VCC15A, and VCC15ADCx.
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Type
Clean analog 1.5 V supply to the analog circuitry
Analog 1.5 V supply to the first ADC
Analog 1.5 V supply to the second ADC
Analog 1.5 V supply to the third ADC
Clean 3.3 V analog supply to the analog circuitry. VCC33A is also used to feed the
1.5 V voltage regulator for designs that do not provide an external supply to VCC. Refer
to the Voltage Regulator (VR), Power Supply Monitor (PSM), and Power Modes section
in the
Analog 3.3 V supply to the first ADC.
Analog 3.3 V supply to the second ADC
Analog 3.3 V supply to the third ADC
Analog clean 3.3 V supply to the charge pump. To avoid high current draw, VCC33AP
should be powered up simultaneously with or after VCC33A.
–3.3 V output from the voltage converter. A 2.2 µF capacitor must be connected from
this pin to GND. Analog charge pump capacitors are not needed if none of the analog
SCB features are used and none of the SDDs are used. In that case it should be left
unconnected.
Analog 3.3 V supply to the first sigma-delta DAC
Common analog 3.3 V supply to the second and third sigma-delta DACs
Digital 1.5 V power supply to the embedded nonvolatile memory blocks. To avoid high
current draw, VCC should be powered up before or simultaneously with VCCENVM.
Digital 1.5 V power supply to the embedded SRAM blocks. Available only on the
208PQFP package. It should be connected to VCC (in other packages, it is internally
connected to VCC).
Digital supply to the FPGA fabric I/O bank 0 (north FPGA I/O bank) for the output
buffers and I/O logic.
Each bank can have a separate VCCFPGAIO connection. All I/Os in a bank will run off
the same VCCFPGAIO supply. VCCFPGAIO can be 1.5 V, 1.8 V, 2.5 V, or 3.3 V,
nominal voltage. Unused I/O banks should have their corresponding VCCFPGAIO pins
tied to GND.
Digital supply to the FPGA fabric I/O bank 1 (east FPGA I/O bank) for the output buffers
and I/O logic.
Digital supply to the FPGA fabric I/O bank 5 (west FPGA I/O bank) for the output buffers
and I/O logic.
Each bank can have a separate VCCFPGAIO connection. All I/Os in a bank will run off
the same VCCFPGAIO supply. VCCFPGAIO can be 1.5 V, 1.8 V, 2.5 V, or 3.3 V,
nominal voltage. Unused I/O banks should have their corresponding VCCFPGAIO pins
tied to GND.
Each bank can have a separate VCCFPGAIO connection. All I/Os in a bank will run off
the same VCCFPGAIO supply. VCCFPGAIO can be 1.5 V, 1.8 V, 2.5 V, or 3.3 V,
nominal voltage. Unused I/O banks should have their corresponding VCCFPGAIO pins
tied to GND.
Analog supply to the low power 32 KHz crystal oscillator
SmartFusion Microcontroller Subsystem User’s Guide
R e vi s i o n 6
Description
for more information.