A2F500M3G-FGG484 Actel, A2F500M3G-FGG484 Datasheet - Page 24

• Manufacturer Part Number: A2F500M3G-FGG484
• Description: FPGA - Field Programmable Gate Array 500K System Gates
• Manufacturer: Actel

Specifications of A2F500M3G-FGG484

• Processor Series: A2F500
• Core: ARM Cortex M3
• Number Of Logic Blocks: 24
• Maximum Operating Frequency: 100 MHz
• Number Of Programmable I/os: 204
• Data Ram Size: 64 KB
• Delay Time: 50 ns
• Supply Voltage (max): 3.6 V
• Supply Current: 2 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.5 V
• Number Of Gates: 500000
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SmartFusion DC and Switching Characteristics
Table 2-13 • Different Components Contributing to Dynamic Power Consumption in SmartFusion Devices
2- 12
Parameter
PAC1
PAC2
PAC3
PAC4
PAC5
PAC6
PAC7
PAC8
PAC9
PAC10
PAC11
PAC12
PAC13
PAC15
PAC16
PAC17
PAC18
PAC19a
PAC19b
PAC20a
PAC20b
PAC21
PAC22
PAC23
PAC24
Power Consumption of Various Internal Resources
Clock contribution of a Global Rib
Clock contribution of a Global Spine
Clock contribution of a VersaTile row
Clock contribution of a VersaTile used as a
sequential module
First contribution of a VersaTile used as a
sequential module
Second contribution of a VersaTile used as
a sequential module
Contribution of a VersaTile used as a
combinatorial module
Average contribution of a routing net
Contribution of an I/O input pin (standard
dependent)
Contribution of an I/O output pin (standard
dependent)
Average contribution of a RAM block
during a read operation
Average contribution of a RAM block
during a write operation
Dynamic Contribution for PLL
Contribution of NVM block during a read
operation (F < 33MHz)
1st contribution of NVM block during a
read operation (F > 33MHz)
2nd contribution of NVM block during a
read operation (F > 33MHz)
Main Crystal Oscillator contribution
RC Oscillator contribution
RC Oscillator contribution
Analog Block Dynamic Power Contribution
of the ADC
Analog Block Dynamic Power Contribution
of the ADC
Low Power Crystal Oscillator contribution
MSS Dynamic Power Contribution –
Running Drysthone at 100MHz
Temperature Monitor Power Contribution
Current Monitor Power Contribution
Definition
1
VCCxxxxIOBx/VCC
VCCxxxxIOBx/VCC
R e visio n 6
See
See
VCCMAINXTAL
VCC33ADCx
VCC15ADCx
VCCLPXTAL
VCCRCOSC
page 2-76
page 2-75
Table 2-92 on
Table 2-91 on
Name
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Power Supply
Domain A2F500 A2F200
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
3.3 V
3.3 V
1.5 V
3.3 V
1.5 V
3.3 V
1.5 V
See
See
–
–
Table 2-11
Table 2-9
5.0
2.5
1.1
0.1
page 2-11
page 2-11
Device
358.00
25.00
30.00
12.88
33.00
67.50
0.07
0.29
0.29
0.70
2.60
4.80
1.98
3.30
3.00
8.25
3.00
1.23
1.03
and
and
0.81
0.11
Table 2-10 on
Table 2-12 on
9.3
0.8
µW/MHz
µW/MHz
µW/MHz
µW/MHz
µW/MHz
µW/MHz
µW/MHz
µW/MHz
µW/MHz
µW/MHz
µW/MHz
µW/MHz
µW/MHz
Units
mW
mW
mW
mW
mW
mW
mW
mW
mW
µW