A2F500M3G-FGG484 Actel, A2F500M3G-FGG484 Datasheet - Page 123

FPGA - Field Programmable Gate Array 500K System Gates

A2F500M3G-FGG484

Manufacturer Part Number
A2F500M3G-FGG484
Description
FPGA - Field Programmable Gate Array 500K System Gates
Manufacturer
Actel
Datasheet

Specifications of A2F500M3G-FGG484

Processor Series
A2F500
Core
ARM Cortex M3
Number Of Logic Blocks
24
Maximum Operating Frequency
100 MHz
Number Of Programmable I/os
204
Data Ram Size
64 KB
Delay Time
50 ns
Supply Voltage (max)
3.6 V
Supply Current
2 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
500000
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ACTEL
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Name
TM0
TM1
TM2
TM3
TM4
SDD0
SDD1
SDD2
Note:
Unused analog inputs should be grounded. This aids in shielding and prevents an undesired coupling path.
Type
Out
Out
Out
In
In
In
In
In
SCB 0 / low side of current monitor / comparator
Negative input / high side of temperature monitor. See the
Temperature Monitor section.
SCB 1 / low side of current monitor / comparator. Negative input /
high side of temperature monitor.
SCB 2 / low side of current monitor / comparator. Negative input /
high side of temperature monitor.
SCB 3 low side of current monitor / comparator. Negative input / high
side of temperature monitor.
SCB 4 low side of current monitor / comparator. Negative input / high
side of temperature monitor.
Output of SDD0
See the Sigma-Delta Digital-to-Analog Converter (DAC) section in
the
Output of SDD1
Output of SDD2
SmartFusion Programmable Analog User’s
Description
R e v i s i o n 6
Guide.
SmartFusion Intelligent Mixed Signal FPGAs
ADC/SDD
ADC0
ADC0
ADC1
ADC1
ADC2
SDD0
SDD1
SDD2
Associated With
SCB0
SCB1
SCB2
SCB3
SCB4
SCB
N/A
N/A
N/A
5- 13

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