A2F500M3G-FGG484 Actel, A2F500M3G-FGG484 Datasheet - Page 44

FPGA - Field Programmable Gate Array 500K System Gates

A2F500M3G-FGG484

Manufacturer Part Number
A2F500M3G-FGG484
Description
FPGA - Field Programmable Gate Array 500K System Gates
Manufacturer
Actel
Datasheet

Specifications of A2F500M3G-FGG484

Processor Series
A2F500
Core
ARM Cortex M3
Number Of Logic Blocks
24
Maximum Operating Frequency
100 MHz
Number Of Programmable I/os
204
Data Ram Size
64 KB
Delay Time
50 ns
Supply Voltage (max)
3.6 V
Supply Current
2 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
500000
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
A2F500M3G-FGG484
Manufacturer:
ACTEL
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SmartFusion DC and Switching Characteristics
Table 2-40 • Minimum and Maximum DC Input and Output Levels
Table 2-41 • Minimum and Maximum DC Input and Output Levels
Figure 2-7 • AC Loading
Table 2-42 • AC Waveforms, Measuring Points, and Capacitive Loads
2- 32
2.5 V LVCMOS
Drive Strength
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
24 mA
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
2.5 V LVCMOS
Drive Strength
8 mA
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
Input Low (V)
0
*
Measuring point = V
Applicable to FPGA I/O Banks
Applicable to MSS I/O Banks
2.5 V LVCMOS
Low-Voltage CMOS for 2.5 V is an extension of the LVCMOS standard (JESD8-5) used for general-
purpose 2.5 V applications. It uses a 5 V–tolerant input buffer and push-pull output buffer.
Test Point
Datapath
Min.
Min.
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
V
V
trip.
Input High (V)
VIL
VIL
See
Max.
Max.
0.7
0.7
0.7
0.7
0.7
0.7
0.7
0.7
V
V
2.5
Table 2-21 on page 2-24
35 pF
Min.
Min.
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
V
V
VIH
V
IH
Max.
Max.
Enable Path
Measuring Point* (V)
2.7
2.7
2.7
2.7
2.7
2.7
2.7
Test Point
3.6
V
V
R = 1 K
for a complete table of trip points.
Max.
Max.
VOL
VOL
1.2
0.7
0.7
0.7
0.7
0.7
0.7
0.7
0.7
V
V
R e visio n 6
VOH
VOH
Min.
Min.
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
R to VCCxxxxIOBx for t
R to GND for t
V
V
35 pF for t
5 pF for t
mA mA
mA mA
I
I
12 12
16 16
24 24
OL
OL
2
4
6
8
8
HZ
ZH
I
I
V
/ t
OH
OH
2
4
6
8
/ t
8
REF
LZ
HZ
ZHS
/ t
(typ.) (V)
ZH
/ t
Max.
Max.
ZL
mA
mA
I
I
124
/ t
OSL
OSL
18
18
37
37
74
87
37
/ t
LZ
ZHS
1
1
ZLS
/ t
ZL
/ t
ZLS
Max.,
Max.
I
mA
I
mA
169
OSH
OSH
16
16
32
32
65
83
32
C
1
1
LOAD
35
µA
µA
15
15
15
15
15
15
15
(pF)
I
I
15 15
IL
IL
2
2
µA
µA
I
15
15
15
15
15
15
I
15
IH
IH
2
2

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