A2F500M3G-FGG484 Actel, A2F500M3G-FGG484 Datasheet - Page 25

FPGA - Field Programmable Gate Array 500K System Gates

A2F500M3G-FGG484

Manufacturer Part Number
A2F500M3G-FGG484
Description
FPGA - Field Programmable Gate Array 500K System Gates
Manufacturer
Actel
Datasheet

Specifications of A2F500M3G-FGG484

Processor Series
A2F500
Core
ARM Cortex M3
Number Of Logic Blocks
24
Maximum Operating Frequency
100 MHz
Number Of Programmable I/os
204
Data Ram Size
64 KB
Delay Time
50 ns
Supply Voltage (max)
3.6 V
Supply Current
2 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
500000
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Table 2-13 • Different Components Contributing to Dynamic Power Consumption in SmartFusion Devices
Table 2-14 • Different Components Contributing to the Static Power Consumption in SmartFusion Devices
Table 2-15 • eNVM Dynamic Power Consumption
Parameter
PAC25
PAC26
PAC27
PAC28
Notes:
1. For a different use of MSS peripherals and resources, refer to SmartPower.
2. Assumes Input = Half Scale Operation mode.
3. Assumes 100 mA load on 1.5 V domain.
Parameter
PDC1
PDC2
PDC3
PDC4
PDC7
PDC8
PDC9
Parameter
eNVM System
PNVMCTRL
Core static power contribution
Device static power contribution in
Standby Mode
Device static power contribution in
Time Keeping mode
eNVM static power contribution
Static
(standard dependent contribution)
Static
(standard dependent contribution)
Static contribution per PLL
ABPS Power Contribution
Sigma-Delta DAC Power Contribution
Comparator Power Contribution
Voltage Regulator Power Contribution
eNVM array operating power
eNVM controller operating power
contribution
contribution
Definition
Description
Definition
per
per
input
input
pin
pin
2
3
VCCxxxxIOBx/VCC
VCCxxxxIOBx/VCC
Read operation
See
See
See
Condition
R e v i s i o n 6
See
See
See
See
page 2-10
page 2-10
page 2-10
Erase
Write
Table 2-8 on
Table 2-8 on
Table 2-8 on
Idle
Name
page 2-79
page 2-82
page 2-81
page 2-84
VCC
Power Supply
VCC
Table 2-94 on
Table 2-96 on
Table 2-95 on
Table 2-97 on
Name
Power Supply
SmartFusion Intelligent Mixed Signal FPGAs
Min.
Domain
Domain A2F500 A2F200
1.5 V
3.3 V
1.5 V
1.5 V
See
See
See
Table 2-11
Table 2-13 on page
Table 2-9
Typ.
900
795
900
A2F500
20
4.5
4.5
page
page
Device
Device
36.30
and
0.70
0.58
0.96
0.00
1.19
and
2.55
2-11.
2-11.
Max.
A2F200
Table 2-10 on
Table 2-12 on
1.50
1.50
2-12.
µW/MHz
Units
Units
µA
µA
µA
mW
mW
mW
mW
Units
mW
mW
mW
mW
mW
2- 13

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