A2F500M3G-FGG484 Actel, A2F500M3G-FGG484 Datasheet - Page 19

FPGA - Field Programmable Gate Array 500K System Gates

A2F500M3G-FGG484

Manufacturer Part Number
A2F500M3G-FGG484
Description
FPGA - Field Programmable Gate Array 500K System Gates
Manufacturer
Actel
Datasheet

Specifications of A2F500M3G-FGG484

Processor Series
A2F500
Core
ARM Cortex M3
Number Of Logic Blocks
24
Maximum Operating Frequency
100 MHz
Number Of Programmable I/os
204
Data Ram Size
64 KB
Delay Time
50 ns
Supply Voltage (max)
3.6 V
Supply Current
2 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
500000
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A2F500M3G-FGG484
Manufacturer:
ACTEL
Quantity:
6 800
Part Number:
A2F500M3G-FGG484
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
A2F500M3G-FGG484
Quantity:
140
Part Number:
A2F500M3G-FGG484I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
A2F500M3G-FGG484I
Manufacturer:
ACTEL/爱特
Quantity:
20 000
Thermal Characteristics
Introduction
The temperature variable in the SoC Products Group Designer software refers to the junction
temperature, not the ambient, case, or board temperatures. This is an important distinction because
dynamic and static power consumption will cause the chip's junction temperature to be higher than the
ambient, case, or board temperatures.
resistance, temperature gradient, and power.
where
Table 2-6 • Package Thermal Resistance
θ
θ
θ
T
T
T
T
P
Product
A2F200M3F-FG256
A2F200M3F-FG484
JA
JB
JC
A
J
B
C
= Junction-to-air thermal resistance
= Junction-to-board thermal resistance
= Junction-to-case thermal resistance
= Junction temperature
= Ambient temperature
= Board temperature (measured 1.0 mm away from the
= Case temperature
= Total power dissipated by the device
package edge)
X = 4.0; Y = 5.6
X = 5.10; Y = 7.3
Die Size
(mm)
EQ 1
R e v i s i o n 6
θ
θ
33.7
21.8
θ
Still Air
JB
JC
JA
through
=
=
=
T
------------------ -
T
------------------ -
T
----------------- -
J
J
J
P
P
P
30.0
18.2
1.0 m/s
θ
T
T
EQ 3
A
B
C
θ
JA
SmartFusion Intelligent Mixed Signal FPGAs
give the relationship between thermal
28.3
16.7
2.5 m/s
9.3
7.7
θ
JC
24.8
16.8
θ
JB
Units
°C/W
°C/W
EQ 1
EQ 2
EQ 3
2 -7

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