EP9315-IBZ Cirrus Logic Inc, EP9315-IBZ Datasheet - Page 443

• Manufacturer Part Number: EP9315-IBZ
• Description: 32-Bit Microcontroller IC
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9315-IBZ

• Controller Family/series: (ARM9)
• Core Size: 32 Bit
• A/d Converter: 12 Bits
• Supply Voltage: 3.3V
• No. Of I/o Pins: 65
• Package / Case: 352-PBGA
• Clock Frequency: 200MHz
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9315A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1144 - KIT DEVELOPMENT EP9315 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1263

DS785UM1
11.2.2 Host Controller Interface
11.2.2.1 Communication Channels
There are two communication channels between the Host Controller and the Host Controller
Driver. The first channel uses a set of operational registers located on the HC. The Host
Controller is the target for all communication on this channel. The operational registers
contain control, status, and list pointer registers. Within the operational register set is a
pointer to a location in shared memory named the Host Controller Communications Area
(HCCA). The HCCA is the second communication channel. The Host Controller is the master
for all communication on this channel. The HCCA contains the head pointers to the interrupt
Endpoint Descriptor lists, the head pointer to the done queue, and status information
associated with start-of-frame processing.
Device Enumeration
OpenHCL
Device Register
in memory space
Operational
Mode
HCCA
Status
Event
Frame Int
Ratio
Control
Bulk
Registers
Figure 11-2. Communication Channels
Copyright 2007 Cirrus Logic
Shared RAM
Host Controller
Communications Area
Interrupt 0
Interrupt 1
Interrupt 2
...
Interrupt 31
...
...
Done
Figure 11-2
shows the communication channels.
Universal Serial Bus Host Controller
EP93xx User’s Guide
11-3
11