AD9548/PCBZ Analog Devices Inc, AD9548/PCBZ Datasheet - Page 80
AD9548/PCBZ
Manufacturer Part Number
AD9548/PCBZ
Description
Clock Generator Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet
1.AD9548BCPZ-REEL7.pdf
(112 pages)
Specifications of AD9548/PCBZ
Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9548
Kit Contents
Board
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9548
Primary Attributes
62.5 ~ 450 MHz Output Frequency
Secondary Attributes
SPI and I2C Compatible Control Port
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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AD9548
Address
0407
Register 0408 to Register 0417—Distribution Channel Dividers
Table 70. Q0 Divider
Address
0408
0409
040A
040B
1
Table 71. Q1 Divider
Address
040C
040D
040E
040F
1
Table 72. Q2 Divider
Address
0410
0411
0412
0413
1
The default value is 0 (or divide by 1).
The default value is 0 (or divide by 1).
The default value is 0 (or divide by 1).
Bits
[7:6]
[5]
[4]
[3]
[2:0]
Bits
[7:0]
[7:0]
[7:0]
[7:6]
[5:0]
Bits
[7:0]
[7:0]
[7:0]
[7:6]
[5:0]
Bits
[7:0]
[7:0]
[7:0]
[7:6]
[5:0]
1
1
1
Bit Name
Unused
OUT3 CMOS phase
invert
OUT3 polarity invert
OUT3 drive strength
OUT3 mode
Bit Name
Q0
Unused
Q0
Bit Name
Q1
Unused
Q1
Bit Name
Q2
Unused
Q2
Description
Q0 divider, Bits[7:0]
Q0 divider, Bits[15:8]
Q0 divider, Bits[23:16]
Q0 divider, Bits[29:24]
Description
Q1 divider, Bits[7:0]
Q1 divider, Bits[15:8]
Q1 divider, Bits[23:16]
Q1 divider, Bits[29:24]
Description
Q2 divider, Bits[7:0]
Q2 divider, Bits[15:8]
Q2 divider, Bits[23:16]
Q2 divider, Bits[29:24]
Description
When the output mode is CMOS, the bit inverts the relative phase between the two
CMOS output pins. Otherwise, this bit is nonfunctional.
0 (default) = not inverted.
1 = inverted.
Invert the polarity of OUT3.
0 (default) = not inverted.
1 = inverted.
OUT3 output drive capability control.
0 (default) = CMOS: low drive strength; LVDS: 3.5 mA nominal.
1 = CMOS: normal drive strength; LVDS: 7 mA nominal.
OUT3 operating mode select.
000 = CMOS (both pins).
001 = CMOS (positive pin), tristate (negative pin).
010 = tristate (positive pin), CMOS (negative pin).
011 (default) = tristate (both pins).
100 = LVDS.
101 = LVPECL.
110 = reserved.
111 = reserved.
Rev. A | Page 80 of 112
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