AD9548/PCBZ Analog Devices Inc, AD9548/PCBZ Datasheet - Page 96

• Manufacturer Part Number: AD9548/PCBZ
• Description: Clock Generator Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9548/PCBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: Network Clock Generator/Synchronizer
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9548
• Kit Contents: Board
• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9548
• Primary Attributes: 62.5 ~ 450 MHz Output Frequency
• Secondary Attributes: SPI and I2C Compatible Control Port
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9548
Table 127. Incremental Phase Offset Control
Address
0A0C
Table 128. Reference Profile Selection State Machine Startup
Address
0A0D
1
Table 129. Reference Validation Override Controls
Address
0A0E
All bits in this register are autoclearing.
Bits
[7:3]
[2]
[1]
[0]
Bits
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Bits
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Bit Name
Detect DD
Detect D
Detect CC
Detect C
Detect BB
Detect B
Detect AA
Detect A
Force Timeout DD
Force Timeout D
Force Timeout CC
Force Timeout C
Force Timeout BB
Force Timeout B
Force Timeout AA
Force Timeout A
Bit Name
Unused
Reset phase offset
Decr phase offset
Incr phase offset
Bit Name
1
Setting this bit starts the profile selection state machine for Input Reference DD.
Setting this bit starts the profile selection state machine for Input Reference D.
Setting this bit starts the profile selection state machine for Input Reference CC.
Setting this bit starts the profile selection state machine for Input Reference C.
Setting this bit starts the profile selection state machine for Input Reference BB.
Setting this bit starts the profile selection state machine for Input Reference B.
Setting this bit starts the profile selection state machine for Input Reference AA.
Setting this bit starts the profile selection state machine for Input Reference A.
Description
Resets the incremental phase offset to 0.
This is an autoclearing bit.
Decrements the incremental phase offset by the amount specified in the incremental
phase lock offset step size register (Register 0314 to Register 0315).
This is an autoclearing bit.
Increments the incremental phase offset by the amount specified in the incremental
phase lock offset step size register (Register 0314 to Register 0315).
This is an autoclearing bit.
Description
Description
Setting this bit emulates a timeout of the validation timer for Reference DD.
This is an autoclearing bit.
Setting this bit emulates a timeout of the validation timer for Reference D.
This is an autoclearing bit.
Setting this bit emulates a timeout of the validation timer for Reference CC.
This is an autoclearing bit.
Setting this bit emulates a timeout of the validation timer for Reference C.
This is an autoclearing bit.
Setting this bit emulates a timeout of the validation timer for Reference BB.
This is an autoclearing bit.
Setting this bit emulates a timeout of the validation timer for Reference B.
This is an autoclearing bit.
Setting this bit emulates a timeout of the validation timer for Reference AA.
This is an autoclearing bit.
Setting this bit emulates a timeout of the validation timer for Reference A.
This is an autoclearing bit.
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