MC33696MOD434EV Freescale Semiconductor, MC33696MOD434EV Datasheet - Page 31

• Manufacturer Part Number: MC33696MOD434EV
• Description: MCU, MPU & DSP Development Tools MC33696 (ECHO) RF C EVAL
• Manufacturer: Freescale Semiconductor

Specifications of MC33696MOD434EV

• Processor To Be Evaluated: MC9S08RG60
• Interface Type: RS-232
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

If AFFC is reset, the average filter frequency is directly defined by bits DR[1:0], as shown in
If AFFC is set, AFF[1:0] allow the overall receiver sensitivity to be improved by reducing the average
filter cut-off frequency. The typical preamble duration of three Manchester zeroes or ones at the data rate
must then be increased, as shown in
17.2 Command Register
Figure 22
AFFC (Average Filter Frequency Control) enables direct control of the average filter cut-off frequency.
IFLA (IF Level Attenuation) controls the maximum gain of the IF amplifier in OOK modulation.
The reduction in gain can be observed if the IF amplifier AGC system is disabled (by setting RAGC = 1).
MODE selects the mode.
Freescale Semiconductor
Reset Value
Bit Name
0 = Average filter cut-off frequency is defined by DR[1:0]
1 = Average filter cut-off frequency is defined by AFF[1:0]
0 = No effect
1 = Decreases by 20 dB (typical) the maximum gain of the IF amplifier, in OOK modulation only
describes the Command register, COMMAND.
AFFC
Bit 7
0
Table 15. Minimum Number of Manchester Symbols in Preamble
AFF[1:0]
Bit 6
IFLA
0
AFF1
0
0
1
1
Table 14. Average Filter Cut-off Frequency
Table
MODE
Figure 22. COMMAND Register
Bit 5
AFF0
versus DR[1:0] and AFF[1:0]
0
0
1
0
1
MC33696 Data Sheet, Rev. 9
00
01
10
11
15.
RSSIE
Bit 4
00
0
—
—
—
3
Average Filter Cut-off
Frequency
0.5 kHz
01
—
—
Bit 3
EDD
1 kHz
2 kHz
4 kHz
6
3
1
DR[1:0]
Configuration, Command, and Status Registers
10
12
—
6
3
RAGC
Bit 2
0
11
24
12
6
3
FAGC
Bit 1
0
Bit 0
—
1
Table
Addr
11.
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