ADUC7032BSTZ-88-RL Analog Devices Inc, ADUC7032BSTZ-88-RL Datasheet - Page 44

• Manufacturer Part Number: ADUC7032BSTZ-88-RL
• Description: Flash 96k ARM7 TRIPLE 16-Bit ADC LIN IC.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7032BSTZ-88-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Bit
4
3
2
1
0
ADuC7032-8L
ADC Interrupt Source Enable Register
Name: ADCMSKI
Address: 0xFFFF0504
Default Value: 0x00
Access: Read/write
Function: This register allows the ADC interrupt sources to be enabled individually. The bit positions in this register are the same as the
lower eight bits in the ADCSTA MMR. If a bit is set by user code to 1, the respective interrupt is enabled. By default, all bits are set to 0,
meaning that all ADC interrupt sources are disabled.
Description
Current Channel ADC Comparator Threshold.
Current Channel ADC Overrange Bit.
Temperature Conversion Result-Ready Bit.
Voltage Conversion Result-Ready Bit.
Current Conversion Result-Ready Bit.
Valid only if the current channel ADC comparator is enabled via the ADCCFG MMR.
Set by hardware if the absolute value of the I-ADC conversion result exceeds the value written in the ADC0TH MMR. If the ADC
threshold counter is used (ADC0TCL), this bit is set only when the specified number of I-ADC conversions equals the value in the
ADC0THV MMR.
If the overrange detect function is enabled via the ADCCFG MMR, this bit is set by hardware if the I-ADC input is grossly (>30%
approximately) overranged. This bit is updated every 125 μs.
When set, this bit can only be cleared by software when ADCCFG[2] is cleared to disable the function or the ADC gain is changed
via the ADC0CON MMR.
If the temperature channel ADC is enabled, this bit is set by hardware as soon as a valid temperature conversion result is written in
the temperature data register (ADC2DAT MMR).
Cleared by reading either ADC2DAT or ADC0DAT.
If the voltage channel ADC is enabled, this bit is set by hardware as soon as a valid voltage conversion result is written in the
voltage data register (ADC1DAT MMR).
Cleared by reading either ADC1DAT or ADC0DAT.
If the current channel ADC is enabled, this bit is set by hardware as soon as a valid current conversion result is written in the
current data register (ADC0DAT MMR).
Cleared by reading ADC0DAT.
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