ADUC7032BSTZ-88-RL Analog Devices Inc, ADUC7032BSTZ-88-RL Datasheet - Page 78

• Manufacturer Part Number: ADUC7032BSTZ-88-RL
• Description: Flash 96k ARM7 TRIPLE 16-Bit ADC LIN IC.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7032BSTZ-88-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ADuC7032-8L
Timer3 Control Register
Name: T3CON
Address: 0xFFFF0368
Default Value: 0x0000
Access: Read/write once only
Function: This 16-bit MMR configures the mode of operation of Timer3, as shown in Table 57.
Table 57. T3CON MMR Bit Designations
Bit
15 to 9
8
7
6
5
4
3 to 2
1
0
Description
Reserved. These bits are reserved and should be written as 0 by user code.
Count Up/Count Down Enable.
Timer3 Enable.
Timer3 Operating Mode.
Watchdog Timer Mode Enable.
Reserved. This bit is reserved and should be written as 0 by user code.
Timer3 Clock (32.768 kHz) Prescalar.
Watchdog Timer IRQ Enable.
PD_OFF.
Set by user code to configure Timer3 to count up.
Cleared by user code to configure Timer3 to count down.
Set by user code to enable Timer3.
Cleared by user code to disable Timer3.
Set by user code to configure Timer3 to operate in periodic mode.
Cleared by user to configure Timer3 to operate in free-running mode.
Set by user code to enable watchdog mode.
Cleared by user code to disable watchdog mode.
Set by user code to produce an IRQ instead of a reset when the watchdog reaches 0.
Cleared by user code to disable the IRQ option.
Set by user code to stop Timer3 when the peripherals are powered down via Bit 4 in the POWCON MMR.
Cleared by user code to enable Timer3 when the peripherals are powered down via Bit 4 in the POWCON MMR.
00 = source clock/1 (default).
01 = source clock/16.
10 = source clock/256.
11 = reserved.
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