ADUC7032BSTZ-88-RL Analog Devices Inc, ADUC7032BSTZ-88-RL Datasheet - Page 59

• Manufacturer Part Number: ADUC7032BSTZ-88-RL
• Description: Flash 96k ARM7 TRIPLE 16-Bit ADC LIN IC.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7032BSTZ-88-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

A factory or end-of-line calibration for the I-ADC is a two-step
procedure.
1.
2.
Understanding the Offset and Gain Calibration Registers
The output of the average block in the ADC signal flow (described
previously after the digital filter and before the offset and gain
scaling can be considered to be a fractional number with a span,
for a ±full-scale input of approximately ±0.75. The span is less
than ±1.0 because there is attenuation in the modulator to accom-
modate some overrange capacity on the input signal. The exact
value of the attenuation varies slightly from part to part because
of manufacturing tolerances.
The offset coefficient is read from the ADC0OF calibration
register. This value is a 16-bit twos complement number. The
range of this number, in terms of the signal chain, is effectively
±1.0. The value of 1 LSB of the ADC0OF register is not, therefore,
the same as 1 LSB of ADC0DAT.
A positive value of ADC0OF indicates that the offset is subtracted
from the output of the filter, and a negative value of ADC0OF
indicates that the offset is added to the output of the filter. The
nominal value of this register is 0x0000, indicating zero offset is to
be removed. The actual offset of the ADC may vary slightly from
part to part and at different PGA gains. The offset within the
ADC is minimized if chop mode is active (ADCFLT[15] = 1).
The gain coefficient is a unitless scaling factor. The 16-bit value
in this register is divided by 16,384 and then multiplied by the
offset-corrected value. The nominal value of this register equals
0x5555, which corresponds to a multiplication factor of 1.3333.
This scales the nominal ±0.75 signal to produce a full-scale output
signal of ±1.0, which is checked for overflow/underflow and
converted to twos complement or unipolar mode, as appropriate,
before being output to the data register.
The actual gain, and the required scaling coefficient for zero
gain error, vary slightly from part to part, and at different PGA
settings and in normal/low power mode. The value downloaded
into ADC0GN at power-on/reset represents the scaling factor
for a PGA gain = 1. There is some level of gain error if this value
is used at different PGA settings. User code can overwrite the
calibration coefficients or run ADC calibrations to correct the
gain error at the PGA setting in use.
Apply 0 A current.
Configure the ADC in the required PGA setting and so on,
and write to ADCMDE[2:0] to perform a system zero-scale
calibration. This writes a new offset calibration value into
ADC0OF.
Apply a full-scale current for the selected PGA setting.
Write to ADCMDE to perform a system full-scale calibration.
This writes a new gain calibration value into ADC0GN.
Rev. A | Page 59 of 120
In summary, the simplified ADC transfer function can be
described as
This equation is valid for both the voltage and temperature
channel ADCs.
For the current channel ADC
where K is dependent on the PGA gain setting and ADC mode.
Normal Mode
For PGA gains of 1, 4, 8, 16, 32, and 64, the K factor is 1. For
PGA gains of 2 and 128, the K factor is 2. For a PGA gain of
256, the K factor is 4. For a PGA gain of 512, the K factor is 8.
Low Power Mode
The PGA gain is set to 128, and the K factor is 32.
Low Power Plus Mode
The K factor is 8.
In low power and low power plus mode, the K factor doubles if
(REG_AVDD)/2 is used as the reference.
ADC DIAGNOSTICS
The ADuC7032-8L features diagnostic capability on all three
ADCs.
Current ADC Diagnostics
The ADuC7032-8L features the capability to detect open-circuit
conditions on the application board. This is accomplished using
the two current sources on IIN+ and IIN−, which is controlled
via ADC0CON[14:13].
Note that these current sources have a tolerance of ±30%. A PGA
gain equal to or greater than 2 (ADC0CON[3:0] ≥ 0001) must
be used when current sources are enabled.
Temperature ADC Diagnostics
The ADuC7032-8L features the capability to detect open-circuit
conditions on the temperature channel inputs. This is accom-
plished using the two current sources on VTEMP and GND_SW,
which is controlled via ADC2CON[14:13].
Note that the current sources have a tolerance of ±30%.
ADCOUT
ADCOUT
=
=
⎡
⎢ ⎣
⎡
⎢ ⎣
VIN
VIN
VREF
VREF
×
×
PGA
PGA
−
−
ADCOF
K
×
ADCOF
⎤
⎥ ⎦
×
ADuC7032-8L
ADCGNNOM
⎤
⎥ ⎦
×
ADCGN
ADCGNNOM
ADCGN